[SubZero] Fix f64 to/from i64 moves

src/IceTargetLoweringARM32.cpp

 //===- subzero/src/IceTargetLoweringARM32.cpp - ARM32 lowering ------------===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 4954 matching lines @@
       legalize(Ctx->getConstantZero(IceType_i32), Legal_Reg | Legal_Flex);
   _mov(T, _0);
   _mov(DestHi, T);
 }
 
 void TargetARM32::lowerIntrinsicCall(const InstIntrinsicCall *Instr) {
   Variable *Dest = Instr->getDest();
   Type DestTy = (Dest != nullptr) ? Dest->getType() : IceType_void;
   Intrinsics::IntrinsicID ID = Instr->getIntrinsicInfo().ID;
   switch (ID) {
-  default:
-    llvm::report_fatal_error("Unexpected intrinsic");
-    return;
   case Intrinsics::AtomicFence:
   case Intrinsics::AtomicFenceAll:
     assert(Dest == nullptr);
     _dmb();
     return;
   case Intrinsics::AtomicIsLockFree: {
     Operand *ByteSize = Instr->getArg(0);
     auto *CI = llvm::dyn_cast<ConstantInteger32>(ByteSize);
     if (CI == nullptr) {
       // The PNaCl ABI requires the byte size to be a compile-time constant.
@@ skipping 2170 matching lines @@
   // However, for compatibility with current NaCl LLVM, don't claim that.
   Str << ".eabi_attribute 14, 3   @ Tag_ABI_PCS_R9_use: Not used\n";
 }
 
 SmallBitVector TargetARM32::TypeToRegisterSet[RegARM32::RCARM32_NUM];
 SmallBitVector TargetARM32::TypeToRegisterSetUnfiltered[RegARM32::RCARM32_NUM];
 SmallBitVector TargetARM32::RegisterAliases[RegARM32::Reg_NUM];
 
 } // end of namespace ARM32
 } // end of namespace Ice