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Side by Side Diff: include/libyuv/macros_msa.h

Issue 2430313005: Add MSA optimized I422ToARGBRow_MSA and I422ToRGBARow_MSA functions (Closed)
Patch Set: Created 4 years, 2 months ago
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1 /* 1 /*
2 * Copyright 2016 The LibYuv Project Authors. All rights reserved. 2 * Copyright 2016 The LibYuv Project Authors. All rights reserved.
3 * 3 *
4 * Use of this source code is governed by a BSD-style license 4 * Use of this source code is governed by a BSD-style license
5 * that can be found in the LICENSE file in the root of the source 5 * that can be found in the LICENSE file in the root of the source
6 * tree. An additional intellectual property rights grant can be found 6 * tree. An additional intellectual property rights grant can be found
7 * in the file PATENTS. All contributing project authors may 7 * in the file PATENTS. All contributing project authors may
8 * be found in the AUTHORS file in the root of the source tree. 8 * be found in the AUTHORS file in the root of the source tree.
9 */ 9 */
10 10
11 #ifndef INCLUDE_LIBYUV_MACROS_MSA_H_ 11 #ifndef INCLUDE_LIBYUV_MACROS_MSA_H_
12 #define INCLUDE_LIBYUV_MACROS_MSA_H_ 12 #define INCLUDE_LIBYUV_MACROS_MSA_H_
13 13
14 #if !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa) 14 #if !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa)
15 #include <stdint.h> 15 #include <stdint.h>
16 #include <msa.h> 16 #include <msa.h>
17 17
18 #if (__mips_isa_rev >= 6)
19 #define LW(psrc) ( { \
20 uint8 *psrc_lw_m = (uint8 *) (psrc); \
21 uint32 val_m; \
22 \
23 asm volatile ( \
24 "lw %[val_m], %[psrc_lw_m] \n\t" \
25 \
fbarchard1 2016/10/24 17:36:31 remove blank line
26 : [val_m] "=r" (val_m) \
27 : [psrc_lw_m] "m" (*psrc_lw_m) \
28 ); \
29 \
30 val_m; \
31 } )
32
33 #if (__mips == 64)
34 #define LD(psrc) ( { \
35 uint8 *psrc_ld_m = (uint8 *) (psrc); \
36 uint64 val_m = 0; \
37 \
38 asm volatile ( \
39 "ld %[val_m], %[psrc_ld_m] \n\t" \
40 \
41 : [val_m] "=r" (val_m) \
42 : [psrc_ld_m] "m" (*psrc_ld_m) \
43 ); \
44 \
45 val_m; \
46 } )
47 #else // !(__mips == 64)
48 #define LD(psrc) ( { \
49 uint8 *psrc_ld_m = (uint8 *) (psrc); \
50 uint32 val0_m, val1_m; \
51 uint64 val_m = 0; \
52 \
53 val0_m = LW(psrc_ld_m); \
54 val1_m = LW(psrc_ld_m + 4); \
55 \
56 val_m = (uint64) (val1_m); \
57 val_m = (uint64) ((val_m << 32) & 0xFFFFFFFF00000000); \
58 val_m = (uint64) (val_m | (uint64) val0_m); \
59 \
60 val_m; \
61 } )
62 #endif // (__mips == 64)
63 #else // !(__mips_isa_rev >= 6)
64 #define LW(psrc) ( { \
65 uint8 *psrc_lw_m = (uint8 *) (psrc); \
66 uint32 val_m; \
67 \
68 asm volatile ( \
69 "ulw %[val_m], %[psrc_lw_m] \n\t" \
70 \
71 : [val_m] "=r" (val_m) \
72 : [psrc_lw_m] "m" (*psrc_lw_m) \
73 ); \
74 \
75 val_m; \
76 } )
77
78 #if (__mips == 64)
79 #define LD(psrc) ( { \
80 uint8 *psrc_ld_m = (uint8 *) (psrc); \
81 uint64 val_m = 0; \
82 \
83 asm volatile ( \
84 "uld %[val_m], %[psrc_ld_m] \n\t" \
85 \
86 : [val_m] "=r" (val_m) \
87 : [psrc_ld_m] "m" (*psrc_ld_m) \
88 ); \
89 \
90 val_m; \
91 } )
92 #else // !(__mips == 64)
93 #define LD(psrc) ( { \
94 uint8 *psrc_ld_m = (uint8 *) (psrc); \
95 uint32 val0_m, val1_m; \
96 uint64 val_m = 0; \
97 \
98 val0_m = LW(psrc_ld_m); \
99 val1_m = LW(psrc_ld_m + 4); \
100 \
101 val_m = (uint64) (val1_m); \
102 val_m = (uint64) ((val_m << 32) & 0xFFFFFFFF00000000); \
103 val_m = (uint64) (val_m | (uint64) val0_m); \
104 \
105 val_m; \
106 } )
107 #endif // (__mips == 64)
108 #endif // (__mips_isa_rev >= 6)
109
18 #define LD_B(RTYPE, psrc) *((RTYPE*)(psrc)) /* NOLINT */ 110 #define LD_B(RTYPE, psrc) *((RTYPE*)(psrc)) /* NOLINT */
19 #define LD_UB(...) LD_B(v16u8, __VA_ARGS__) 111 #define LD_UB(...) LD_B(v16u8, __VA_ARGS__)
20 112
21 #define ST_B(RTYPE, in, pdst) *((RTYPE*)(pdst)) = (in) /* NOLINT */ 113 #define ST_B(RTYPE, in, pdst) *((RTYPE*)(pdst)) = (in) /* NOLINT */
22 #define ST_UB(...) ST_B(v16u8, __VA_ARGS__) 114 #define ST_UB(...) ST_B(v16u8, __VA_ARGS__)
23 115
24 /* Description : Load two vectors with 16 'byte' sized elements 116 /* Description : Load two vectors with 16 'byte' sized elements
25 Arguments : Inputs - psrc, stride 117 Arguments : Inputs - psrc, stride
26 Outputs - out0, out1 118 Outputs - out0, out1
27 Return Type - as per RTYPE 119 Return Type - as per RTYPE
(...skipping 52 matching lines...) Expand 10 before | Expand all | Expand 10 after
80 */ 172 */
81 #define ILVRL_B2(RTYPE, in0, in1, out0, out1) { \ 173 #define ILVRL_B2(RTYPE, in0, in1, out0, out1) { \
82 out0 = (RTYPE) __msa_ilvr_b((v16i8) in0, (v16i8) in1); \ 174 out0 = (RTYPE) __msa_ilvr_b((v16i8) in0, (v16i8) in1); \
83 out1 = (RTYPE) __msa_ilvl_b((v16i8) in0, (v16i8) in1); \ 175 out1 = (RTYPE) __msa_ilvl_b((v16i8) in0, (v16i8) in1); \
84 } 176 }
85 #define ILVRL_B2_UB(...) ILVRL_B2(v16u8, __VA_ARGS__) 177 #define ILVRL_B2_UB(...) ILVRL_B2(v16u8, __VA_ARGS__)
86 178
87 #endif /* !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa) */ 179 #endif /* !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa) */
88 180
89 #endif // INCLUDE_LIBYUV_MACROS_MSA_H_ 181 #endif // INCLUDE_LIBYUV_MACROS_MSA_H_
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