Adds load/store from signed unscaled 9-bit offset w/ no writeback.

runtime/vm/assembler_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_ASSEMBLER_ARM64_H_
 #define VM_ASSEMBLER_ARM64_H_
 
 #ifndef VM_ASSEMBLER_H_
 #error Do not include assembler_arm64.h directly; use assembler.h instead.
 #endif
@@ skipping 81 matching lines @@
     Unknown,
   };
 
   // Offset is in bytes. For the unsigned imm12 case, we unscale based on the
   // operand size, and assert that offset is aligned accordingly.
   // For the smaller signed imm9 case, the offset is the number of bytes, but
   // is unscaled.
   Address(Register rn, int32_t offset = 0, AddressType at = Offset,
           OperandSize sz = kDoubleWord) {
     ASSERT((rn != R31) && (rn != ZR));
+    ASSERT(CanHoldOffset(offset, at, sz));
     const Register crn = ConcreteRegister(rn);
     const int32_t scale = Log2OperandSizeBytes(sz);
-    if (Utils::IsUint(12 + scale, offset) && (at == Offset)) {
-      ASSERT(offset == ((offset >> scale) << scale));
+    if ((at == Offset) &&
+         Utils::IsUint(12 + scale, offset) &&
+        (offset == ((offset >> scale) << scale))) {
       encoding_ =
           B24 |
           ((offset >> scale) << kImm12Shift) |
           (static_cast<int32_t>(crn) << kRnShift);
+    } else if ((at == Offset) &&
+               Utils::IsInt(9, offset)) {
+      encoding_ =
+          ((offset & 0x1ff) << kImm9Shift) |
+          (static_cast<int32_t>(crn) << kRnShift);
     } else {
       ASSERT(Utils::IsInt(9, offset));
       ASSERT((at == PreIndex) || (at == PostIndex));
       int32_t idx = (at == PostIndex) ? B10 : (B11 | B10);
       encoding_ =
           idx |
           ((offset & 0x1ff) << kImm9Shift) |
           (static_cast<int32_t>(crn) << kRnShift);
     }
     type_ = at;
     base_ = crn;
   }
 
   static bool CanHoldOffset(int32_t offset, AddressType at = Offset,
                             OperandSize sz = kDoubleWord) {
     if (at == Offset) {
-      // Fits in 12 bit unsigned and right alignment for sz.
+      // Offset fits in 12 bit unsigned and has right alignment for sz,
+      // or fits in 9 bit signed offset with no alignment restriction.
       const int32_t scale = Log2OperandSizeBytes(sz);
-      return Utils::IsUint(12 + scale, offset) &&
-             (offset == ((offset >> scale) << scale));
+      return (Utils::IsUint(12 + scale, offset) &&
+              (offset == ((offset >> scale) << scale))) ||
+             (Utils::IsInt(9, offset));
     } else if (at == PCOffset) {
       return Utils::IsInt(21, offset) &&
              (offset == ((offset >> 2) << 2));
     } else {
       ASSERT((at == PreIndex) || (at == PostIndex));
       return Utils::IsInt(9, offset);
     }
   }
 
   // PC-relative load address.
@@ skipping 853 matching lines @@
     Emit(encoding);
   }
 
   DISALLOW_ALLOCATION();
   DISALLOW_COPY_AND_ASSIGN(Assembler);
 };
 
 }  // namespace dart
 
 #endif  // VM_ASSEMBLER_ARM64_H_