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| 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" | 5 #include "vm/globals.h" |
| 6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
| 10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
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| 261 const intptr_t object_pool_pc_dist = | 261 const intptr_t object_pool_pc_dist = |
| 262 Instructions::HeaderSize() - Instructions::object_pool_offset() + | 262 Instructions::HeaderSize() - Instructions::object_pool_offset() + |
| 263 CodeSize(); | 263 CodeSize(); |
| 264 // PP <- Read(PC - object_pool_pc_dist). | 264 // PP <- Read(PC - object_pool_pc_dist). |
| 265 ldr(pp, Address::PC(-object_pool_pc_dist)); | 265 ldr(pp, Address::PC(-object_pool_pc_dist)); |
| 266 | 266 |
| 267 // When in the PP register, the pool pointer is untagged. When we | 267 // When in the PP register, the pool pointer is untagged. When we |
| 268 // push it on the stack with PushPP it is tagged again. PopPP then untags | 268 // push it on the stack with PushPP it is tagged again. PopPP then untags |
| 269 // when restoring from the stack. This will make loading from the object | 269 // when restoring from the stack. This will make loading from the object |
| 270 // pool only one instruction for the first 4096 entries. Otherwise, because | 270 // pool only one instruction for the first 4096 entries. Otherwise, because |
| 271 // the offset wouldn't be aligned, it would always be at least two | 271 // the offset wouldn't be aligned, it would be only one instruction for the |
| 272 // instructions. | 272 // first 64 entries. |
| 273 sub(pp, pp, Operand(kHeapObjectTag)); | 273 sub(pp, pp, Operand(kHeapObjectTag)); |
| 274 } | 274 } |
| 275 | 275 |
| 276 void Assembler::LoadWordFromPoolOffset(Register dst, Register pp, | 276 void Assembler::LoadWordFromPoolOffset(Register dst, Register pp, |
| 277 uint32_t offset) { | 277 uint32_t offset) { |
| 278 ASSERT(dst != pp); | 278 ASSERT(dst != pp); |
| 279 if (Address::CanHoldOffset(offset)) { | 279 if (Address::CanHoldOffset(offset)) { |
| 280 ldr(dst, Address(pp, offset)); | 280 ldr(dst, Address(pp, offset)); |
| 281 } else { | 281 } else { |
| 282 const uint16_t offset_low = Utils::Low16Bits(offset); | 282 const uint16_t offset_low = Utils::Low16Bits(offset); |
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| 552 LoadImmediate(TMP2, imm, pp); | 552 LoadImmediate(TMP2, imm, pp); |
| 553 cmp(rn, Operand(TMP2)); | 553 cmp(rn, Operand(TMP2)); |
| 554 } | 554 } |
| 555 } | 555 } |
| 556 | 556 |
| 557 | 557 |
| 558 void Assembler::LoadFromOffset(Register dest, Register base, int32_t offset) { | 558 void Assembler::LoadFromOffset(Register dest, Register base, int32_t offset) { |
| 559 ASSERT(base != TMP2); | 559 ASSERT(base != TMP2); |
| 560 if (Address::CanHoldOffset(offset)) { | 560 if (Address::CanHoldOffset(offset)) { |
| 561 ldr(dest, Address(base, offset)); | 561 ldr(dest, Address(base, offset)); |
| 562 } else if (Address::CanHoldOffset(offset, Address::PreIndex)) { | |
| 563 mov(TMP2, base); | |
| 564 ldr(dest, Address(TMP2, offset, Address::PreIndex)); | |
| 565 } else { | 562 } else { |
| 566 // Since offset is 32-bits, it won't be loaded from the pool. | 563 // Since offset is 32-bits, it won't be loaded from the pool. |
| 567 AddImmediate(TMP2, base, offset, kNoRegister); | 564 AddImmediate(TMP2, base, offset, kNoRegister); |
| 568 ldr(dest, Address(TMP2)); | 565 ldr(dest, Address(TMP2)); |
| 569 } | 566 } |
| 570 } | 567 } |
| 571 | 568 |
| 572 | 569 |
| 573 void Assembler::StoreToOffset(Register src, Register base, int32_t offset) { | 570 void Assembler::StoreToOffset(Register src, Register base, int32_t offset) { |
| 574 ASSERT(src != TMP2); | 571 ASSERT(src != TMP2); |
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| 642 | 639 |
| 643 | 640 |
| 644 void Assembler::CallRuntime(const RuntimeEntry& entry, | 641 void Assembler::CallRuntime(const RuntimeEntry& entry, |
| 645 intptr_t argument_count) { | 642 intptr_t argument_count) { |
| 646 entry.Call(this, argument_count); | 643 entry.Call(this, argument_count); |
| 647 } | 644 } |
| 648 | 645 |
| 649 } // namespace dart | 646 } // namespace dart |
| 650 | 647 |
| 651 #endif // defined TARGET_ARCH_ARM64 | 648 #endif // defined TARGET_ARCH_ARM64 |
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