[wasm] Trim graph before scheduling.

src/compiler/mips/instruction-selector-mips.cc

Index: src/compiler/mips/instruction-selector-mips.cc
diff --git a/src/compiler/mips/instruction-selector-mips.cc b/src/compiler/mips/instruction-selector-mips.cc
index 0a98930b5c4ce8ee779e045ba804e17156c0b58a..54ea39c44ece9054172a3241e4604f19c2ceb791 100644
--- a/src/compiler/mips/instruction-selector-mips.cc
+++ b/src/compiler/mips/instruction-selector-mips.cc
@@ -429,32 +429,43 @@ void InstructionSelector::VisitWord32Sar(Node* node) {
 }
 
 static void VisitInt32PairBinop(InstructionSelector* selector,
-                                InstructionCode opcode, Node* node) {
+                                InstructionCode pair_opcode,
+                                InstructionCode single_opcode, Node* node) {
   MipsOperandGenerator g(selector);
 
-  // We use UseUniqueRegister here to avoid register sharing with the output
-  // register.
-  InstructionOperand inputs[] = {g.UseUniqueRegister(node->InputAt(0)),
-                                 g.UseUniqueRegister(node->InputAt(1)),
-                                 g.UseUniqueRegister(node->InputAt(2)),
-                                 g.UseUniqueRegister(node->InputAt(3))};
+  Node* projection1 = NodeProperties::FindProjection(node, 1);
 
-  InstructionOperand outputs[] = {
-      g.DefineAsRegister(node),
-      g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
-  selector->Emit(opcode, 2, outputs, 4, inputs);
+  if (projection1) {
+    // We use UseUniqueRegister here to avoid register sharing with the output
+    // register.
+    InstructionOperand inputs[] = {g.UseUniqueRegister(node->InputAt(0)),
+                                   g.UseUniqueRegister(node->InputAt(1)),
+                                   g.UseUniqueRegister(node->InputAt(2)),
+                                   g.UseUniqueRegister(node->InputAt(3))};
+
+    InstructionOperand outputs[] = {
+        g.DefineAsRegister(node),
+        g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
+    selector->Emit(pair_opcode, 2, outputs, 4, inputs);
+  } else {
+    // The high word of the result is not used, so we emit the standard 32 bit
+    // instruction.
+    selector->Emit(single_opcode, g.DefineSameAsFirst(node),
+                   g.UseRegister(node->InputAt(0)),
+                   g.UseRegister(node->InputAt(2)));
+  }
 }
 
 void InstructionSelector::VisitInt32PairAdd(Node* node) {
-  VisitInt32PairBinop(this, kMipsAddPair, node);
+  VisitInt32PairBinop(this, kMipsAddPair, kMipsAdd, node);
 }
 
 void InstructionSelector::VisitInt32PairSub(Node* node) {
-  VisitInt32PairBinop(this, kMipsSubPair, node);
+  VisitInt32PairBinop(this, kMipsSubPair, kMipsSub, node);
 }
 
 void InstructionSelector::VisitInt32PairMul(Node* node) {
-  VisitInt32PairBinop(this, kMipsMulPair, node);
+  VisitInt32PairBinop(this, kMipsMulPair, kMipsMul, node);
 }
 
 // Shared routine for multiple shift operations.
@@ -475,9 +486,11 @@ static void VisitWord32PairShift(InstructionSelector* selector,
                                  g.UseUniqueRegister(node->InputAt(1)),
                                  shift_operand};
 
+  Node* projection1 = NodeProperties::FindProjection(node, 1);
+
   InstructionOperand outputs[] = {
       g.DefineAsRegister(node),
-      g.DefineAsRegister(NodeProperties::FindProjection(node, 1))};
+      projection1 ? g.DefineAsRegister(projection1) : g.TempRegister()};
 
   selector->Emit(opcode, 2, outputs, 3, inputs);
 }