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Side by Side Diff: src/IceTargetLoweringMIPS32.h

Issue 2420033002: [SubZero] Handle relocatable constants for MIPS (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressed review comments Created 4 years, 2 months ago
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1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===// 1 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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206 } 206 }
207 207
208 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) { 208 void _add_s(Variable *Dest, Variable *Src0, Variable *Src1) {
209 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1); 209 Context.insert<InstMIPS32Add_s>(Dest, Src0, Src1);
210 } 210 }
211 211
212 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) { 212 void _addiu(Variable *Dest, Variable *Src, uint32_t Imm) {
213 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm); 213 Context.insert<InstMIPS32Addiu>(Dest, Src, Imm);
214 } 214 }
215 215
216 void _addiu(Variable *Dest, Variable *Src0, Operand *Src1, RelocOp Reloc) {
217 Context.insert<InstMIPS32Addiu>(Dest, Src0, Src1, Reloc);
218 }
219
216 void _c_eq_d(Variable *Src0, Variable *Src1) { 220 void _c_eq_d(Variable *Src0, Variable *Src1) {
217 Context.insert<InstMIPS32C_eq_d>(Src0, Src1); 221 Context.insert<InstMIPS32C_eq_d>(Src0, Src1);
218 } 222 }
219 223
220 void _c_eq_s(Variable *Src0, Variable *Src1) { 224 void _c_eq_s(Variable *Src0, Variable *Src1) {
221 Context.insert<InstMIPS32C_eq_s>(Src0, Src1); 225 Context.insert<InstMIPS32C_eq_s>(Src0, Src1);
222 } 226 }
223 227
224 void _c_ole_d(Variable *Src0, Variable *Src1) { 228 void _c_ole_d(Variable *Src0, Variable *Src1) {
225 Context.insert<InstMIPS32C_ole_d>(Src0, Src1); 229 Context.insert<InstMIPS32C_ole_d>(Src0, Src1);
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868 explicit TargetHeaderMIPS32(GlobalContext *Ctx); 872 explicit TargetHeaderMIPS32(GlobalContext *Ctx);
869 873
870 private: 874 private:
871 ~TargetHeaderMIPS32() = default; 875 ~TargetHeaderMIPS32() = default;
872 }; 876 };
873 877
874 } // end of namespace MIPS32 878 } // end of namespace MIPS32
875 } // end of namespace Ice 879 } // end of namespace Ice
876 880
877 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H 881 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H
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