Add f16c (halffloat) cpuid

Add f16c (halffloat) cpuid

R=wangcheng@google.com, hubbe@chromium.org
BUG=libyuv:560
Committed: https://chromium.googlesource.com/libyuv/libyuv/+/fdcf524aacb38b1e476f82abe5dc2e7dbf07dbc7

[fbarchard1, 2016-10-14 22:01:09]

Ivybridge has AVX and F16C but not AVX2:

out/Release/cpuid 
Cpu Vendor: GenuineIntel
Cpu Family 6 (0x6), Model 62 (0x3e)
Cpu Flags 4bf1
Has ARM 0
Has MIPS 0
Has X86 10
Has SSE2 20
Has SSSE3 40
Has SSE4.1 80
Has SSE4.2 100
Has AVX 200
Has AVX2 0
Has AVX3 0
Has ERMS 800
Has FMA3 0
Has F16C 4000

[fbarchard1, 2016-10-14 22:01:49]

Description was changed from

==========
f16c test

R=wengchang@google.com
BUG=None
==========

to

==========
Add f16c (halffloat) cpuid

R=wengchang@google.com, hubbe@chromium.org, 
BUG=None
==========

[fbarchard1, 2016-10-14 22:01:49]

fbarchard@google.com changed reviewers:
+ hubbe@chromium.org

[fbarchard1, 2016-10-14 22:03:05]

Description was changed from

==========
Add f16c (halffloat) cpuid

R=wengchang@google.com, hubbe@chromium.org, 
BUG=None
==========

to

==========
Add f16c (halffloat) cpuid

R=wengchang@google.com, hubbe@chromium.org, 
BUG=libyuv:560
==========

[fbarchard1, 2016-10-14 22:17:08]

Some documentation on cpuid for F16C:
https://en.wikipedia.org/wiki/CPUID

[fbarchard1, 2016-10-14 22:26:20]

LIBYUV_DISABLE_F16C=1 out/Release/cpuid 
Cpu Vendor: GenuineIntel
Cpu Family 6 (0x6), Model 62 (0x3e)
Cpu Flags bf1
Has ARM 0
Has MIPS 0
Has X86 10
Has SSE2 20
Has SSSE3 40
Has SSE4.1 80
Has SSE4.2 100
Has AVX 200
Has AVX2 0
Has AVX3 0
Has ERMS 800
Has FMA3 0
Has F16C 0

[fbarchard1, 2016-10-14 22:31:04]

On Macbook Air w/ broadwell

SSE2
TestHalfFloatPlane (474 ms)

F16C
TestHalfFloatPlane (394 ms)

C vectorized to SSE2
TestHalfFloatPlane (483 ms)

[fbarchard1, 2016-10-14 22:51:27]

Description was changed from

==========
Add f16c (halffloat) cpuid

R=wengchang@google.com, hubbe@chromium.org, 
BUG=libyuv:560
==========

to

==========
Add f16c (halffloat) cpuid

R=wangcheng@google.com, hubbe@chromium.org, 
BUG=libyuv:560
==========

[fbarchard1, 2016-10-14 22:52:34]

For now, adding F16C detect is proper thing to test for, but this HalfFloat
conversion isnt a big win over C or SSE2, so consider rewriting the AVX2 code
the same as SSE2 and remove F16C support in future.

[wangcheng, 2016-10-14 23:15:02]

wangcheng@google.com changed reviewers:
+ wangcheng@google.com

[wangcheng, 2016-10-14 23:15:03]

lgtm

[fbarchard1, 2016-10-14 23:34:10]

Description was changed from

==========
Add f16c (halffloat) cpuid

R=wangcheng@google.com, hubbe@chromium.org, 
BUG=libyuv:560
==========

to

==========
Add f16c (halffloat) cpuid

R=wangcheng@google.com, hubbe@chromium.org
BUG=libyuv:560

Committed:
https://chromium.googlesource.com/libyuv/libyuv/+/fdcf524aacb38b1e476f82abe5d...
==========

[fbarchard1, 2016-10-14 23:34:11]

Committed patchset #5 (id:80001) manually as
fdcf524aacb38b1e476f82abe5dc2e7dbf07dbc7 (presubmit successful).