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Issue 2417233002: [Subzero][MIPS32] Fix alloca alignment and offset for Om1 and O2 optimization (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Changed comment in legalizeMov() Created 4 years, 2 months ago
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1 ; This is a basic test of the alloca instruction. 1 ; This is a basic test of the alloca instruction.
2 2
3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 3 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \ 4 ; RUN: --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \
5 ; RUN: | %if --need=target_X8632 --command FileCheck %s 5 ; RUN: | %if --need=target_X8632 --command FileCheck %s
6 6
7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \ 7 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \ 8 ; RUN: --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \
9 ; RUN: | %if --need=target_X8632 --command FileCheck \ 9 ; RUN: | %if --need=target_X8632 --command FileCheck \
10 ; RUN: --check-prefix CHECK-OPTM1 %s 10 ; RUN: --check-prefix CHECK-OPTM1 %s
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87 ; CHECK: call {{.*}} R_{{.*}} f1 87 ; CHECK: call {{.*}} R_{{.*}} f1
88 88
89 ; ARM32-LABEL: fixed_416_align_32 89 ; ARM32-LABEL: fixed_416_align_32
90 ; ARM32-OPT2: sub sp, sp, #424 90 ; ARM32-OPT2: sub sp, sp, #424
91 ; ARM32-OPTM1: sub sp, sp, #416 91 ; ARM32-OPTM1: sub sp, sp, #416
92 ; ARM32: bic sp, sp, #31 92 ; ARM32: bic sp, sp, #31
93 ; ARM32: bl {{.*}} R_{{.*}} f1 93 ; ARM32: bl {{.*}} R_{{.*}} f1
94 94
95 ; MIPS32-LABEL: fixed_416_align_32 95 ; MIPS32-LABEL: fixed_416_align_32
96 ; MIPS32-OPT2: addiu sp,sp,-448 96 ; MIPS32-OPT2: addiu sp,sp,-448
97 ; MIPS32-OPT2: addiu a0,sp,16 97 ; MIPS32-OPT2: addiu a0,sp,32
98 ; MIPS32-OPTM1: addiu sp,sp,-448 98 ; MIPS32-OPTM1: addiu sp,sp,-448
99 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,16 99 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,32
100 ; MIPS32-OPTM1: sw [[REG]],{{.*}} 100 ; MIPS32-OPTM1: sw [[REG]],{{.*}}
101 ; MIPS32-OPTM1: lw a0,{{.*}} 101 ; MIPS32-OPTM1: lw a0,{{.*}}
102 ; MIPS32: jal {{.*}} R_{{.*}} f1 102 ; MIPS32: jal {{.*}} R_{{.*}} f1
103 103
104 ; Show that the amount to allocate will be rounded up. 104 ; Show that the amount to allocate will be rounded up.
105 define internal void @fixed_351_align_16(i32 %n) { 105 define internal void @fixed_351_align_16(i32 %n) {
106 entry: 106 entry:
107 %array = alloca i8, i32 351, align 16 107 %array = alloca i8, i32 351, align 16
108 %__2 = ptrtoint i8* %array to i32 108 %__2 = ptrtoint i8* %array to i32
109 call void @f1(i32 %__2) 109 call void @f1(i32 %__2)
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152 ; CHECK: call {{.*}} R_{{.*}} f1 152 ; CHECK: call {{.*}} R_{{.*}} f1
153 153
154 ; ARM32-LABEL: fixed_351_align_32 154 ; ARM32-LABEL: fixed_351_align_32
155 ; ARM32-OPT2: sub sp, sp, #360 155 ; ARM32-OPT2: sub sp, sp, #360
156 ; ARM32-OPTM1: sub sp, sp, #352 156 ; ARM32-OPTM1: sub sp, sp, #352
157 ; ARM32: bic sp, sp, #31 157 ; ARM32: bic sp, sp, #31
158 ; ARM32: bl {{.*}} R_{{.*}} f1 158 ; ARM32: bl {{.*}} R_{{.*}} f1
159 159
160 ; MIPS32-LABEL: fixed_351_align_32 160 ; MIPS32-LABEL: fixed_351_align_32
161 ; MIPS32-OPT2: addiu sp,sp,-384 161 ; MIPS32-OPT2: addiu sp,sp,-384
162 ; MIPS32-OPT2: addiu a0,sp,16 162 ; MIPS32-OPT2: addiu a0,sp,32
163 ; MIPS32-OPTM1: addiu sp,sp,-384 163 ; MIPS32-OPTM1: addiu sp,sp,-384
164 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,16 164 ; MIPS32-OPTM1: addiu [[REG:.*]],sp,32
165 ; MIPS32-OPTM1: sw [[REG]],{{.*}} 165 ; MIPS32-OPTM1: sw [[REG]],{{.*}}
166 ; MIPS32-OPTM1: lw a0,{{.*}} 166 ; MIPS32-OPTM1: lw a0,{{.*}}
167 ; MIPS32: jal {{.*}} R_{{.*}} f1 167 ; MIPS32: jal {{.*}} R_{{.*}} f1
168 168
169 declare void @f1(i32 %ignored) 169 declare void @f1(i32 %ignored)
170 170
171 declare void @f2(i32 %ignored) 171 declare void @f2(i32 %ignored)
172 172
173 define internal void @variable_n_align_16(i32 %n) { 173 define internal void @variable_n_align_16(i32 %n) {
174 entry: 174 entry:
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395 %p1 = bitcast i8* %a1 to i32* 395 %p1 = bitcast i8* %a1 to i32*
396 %p2 = bitcast i8* %a2 to i32* 396 %p2 = bitcast i8* %a2 to i32*
397 %p3 = bitcast i8* %a3 to i32* 397 %p3 = bitcast i8* %a3 to i32*
398 store i32 %arg, i32* %p1, align 1 398 store i32 %arg, i32* %p1, align 1
399 store i32 %arg, i32* %p2, align 1 399 store i32 %arg, i32* %p2, align 1
400 store i32 %arg, i32* %p3, align 1 400 store i32 %arg, i32* %p3, align 1
401 ret void 401 ret void
402 } 402 }
403 ; CHECK-LABEL: var_with_frameptr 403 ; CHECK-LABEL: var_with_frameptr
404 ; CHECK: mov ebp,esp 404 ; CHECK: mov ebp,esp
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