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Side by Side Diff: src/compiler/instruction-codes.h

Issue 2416243002: Make unittests work in component build (Closed)
Patch Set: updates Created 4 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_COMPILER_INSTRUCTION_CODES_H_ 5 #ifndef V8_COMPILER_INSTRUCTION_CODES_H_
6 #define V8_COMPILER_INSTRUCTION_CODES_H_ 6 #define V8_COMPILER_INSTRUCTION_CODES_H_
7 7
8 #include <iosfwd> 8 #include <iosfwd>
9 9
10 #if V8_TARGET_ARCH_ARM 10 #if V8_TARGET_ARCH_ARM
(...skipping 11 matching lines...) Expand all
22 #elif V8_TARGET_ARCH_PPC 22 #elif V8_TARGET_ARCH_PPC
23 #include "src/compiler/ppc/instruction-codes-ppc.h" 23 #include "src/compiler/ppc/instruction-codes-ppc.h"
24 #elif V8_TARGET_ARCH_S390 24 #elif V8_TARGET_ARCH_S390
25 #include "src/compiler/s390/instruction-codes-s390.h" 25 #include "src/compiler/s390/instruction-codes-s390.h"
26 #elif V8_TARGET_ARCH_X87 26 #elif V8_TARGET_ARCH_X87
27 #include "src/compiler/x87/instruction-codes-x87.h" 27 #include "src/compiler/x87/instruction-codes-x87.h"
28 #else 28 #else
29 #define TARGET_ARCH_OPCODE_LIST(V) 29 #define TARGET_ARCH_OPCODE_LIST(V)
30 #define TARGET_ADDRESSING_MODE_LIST(V) 30 #define TARGET_ADDRESSING_MODE_LIST(V)
31 #endif 31 #endif
32 #include "src/globals.h"
32 #include "src/utils.h" 33 #include "src/utils.h"
33 34
34 namespace v8 { 35 namespace v8 {
35 namespace internal { 36 namespace internal {
36 namespace compiler { 37 namespace compiler {
37 38
38 // Modes for ArchStoreWithWriteBarrier below. 39 // Modes for ArchStoreWithWriteBarrier below.
39 enum class RecordWriteMode { kValueIsMap, kValueIsPointer, kValueIsAny }; 40 enum class RecordWriteMode { kValueIsMap, kValueIsPointer, kValueIsAny };
40 41
41 42
(...skipping 75 matching lines...) Expand 10 before | Expand all | Expand 10 after
117 118
118 enum ArchOpcode { 119 enum ArchOpcode {
119 #define DECLARE_ARCH_OPCODE(Name) k##Name, 120 #define DECLARE_ARCH_OPCODE(Name) k##Name,
120 ARCH_OPCODE_LIST(DECLARE_ARCH_OPCODE) 121 ARCH_OPCODE_LIST(DECLARE_ARCH_OPCODE)
121 #undef DECLARE_ARCH_OPCODE 122 #undef DECLARE_ARCH_OPCODE
122 #define COUNT_ARCH_OPCODE(Name) +1 123 #define COUNT_ARCH_OPCODE(Name) +1
123 kLastArchOpcode = -1 ARCH_OPCODE_LIST(COUNT_ARCH_OPCODE) 124 kLastArchOpcode = -1 ARCH_OPCODE_LIST(COUNT_ARCH_OPCODE)
124 #undef COUNT_ARCH_OPCODE 125 #undef COUNT_ARCH_OPCODE
125 }; 126 };
126 127
127 std::ostream& operator<<(std::ostream& os, const ArchOpcode& ao); 128 V8_EXPORT_PRIVATE std::ostream& operator<<(std::ostream& os,
129 const ArchOpcode& ao);
128 130
129 // Addressing modes represent the "shape" of inputs to an instruction. 131 // Addressing modes represent the "shape" of inputs to an instruction.
130 // Many instructions support multiple addressing modes. Addressing modes 132 // Many instructions support multiple addressing modes. Addressing modes
131 // are encoded into the InstructionCode of the instruction and tell the 133 // are encoded into the InstructionCode of the instruction and tell the
132 // code generator after register allocation which assembler method to call. 134 // code generator after register allocation which assembler method to call.
133 #define ADDRESSING_MODE_LIST(V) \ 135 #define ADDRESSING_MODE_LIST(V) \
134 V(None) \ 136 V(None) \
135 TARGET_ADDRESSING_MODE_LIST(V) 137 TARGET_ADDRESSING_MODE_LIST(V)
136 138
137 enum AddressingMode { 139 enum AddressingMode {
138 #define DECLARE_ADDRESSING_MODE(Name) kMode_##Name, 140 #define DECLARE_ADDRESSING_MODE(Name) kMode_##Name,
139 ADDRESSING_MODE_LIST(DECLARE_ADDRESSING_MODE) 141 ADDRESSING_MODE_LIST(DECLARE_ADDRESSING_MODE)
140 #undef DECLARE_ADDRESSING_MODE 142 #undef DECLARE_ADDRESSING_MODE
141 #define COUNT_ADDRESSING_MODE(Name) +1 143 #define COUNT_ADDRESSING_MODE(Name) +1
142 kLastAddressingMode = -1 ADDRESSING_MODE_LIST(COUNT_ADDRESSING_MODE) 144 kLastAddressingMode = -1 ADDRESSING_MODE_LIST(COUNT_ADDRESSING_MODE)
143 #undef COUNT_ADDRESSING_MODE 145 #undef COUNT_ADDRESSING_MODE
144 }; 146 };
145 147
146 std::ostream& operator<<(std::ostream& os, const AddressingMode& am); 148 V8_EXPORT_PRIVATE std::ostream& operator<<(std::ostream& os,
149 const AddressingMode& am);
147 150
148 // The mode of the flags continuation (see below). 151 // The mode of the flags continuation (see below).
149 enum FlagsMode { 152 enum FlagsMode {
150 kFlags_none = 0, 153 kFlags_none = 0,
151 kFlags_branch = 1, 154 kFlags_branch = 1,
152 kFlags_deoptimize = 2, 155 kFlags_deoptimize = 2,
153 kFlags_set = 3 156 kFlags_set = 3
154 }; 157 };
155 158
156 std::ostream& operator<<(std::ostream& os, const FlagsMode& fm); 159 V8_EXPORT_PRIVATE std::ostream& operator<<(std::ostream& os,
160 const FlagsMode& fm);
157 161
158 // The condition of flags continuation (see below). 162 // The condition of flags continuation (see below).
159 enum FlagsCondition { 163 enum FlagsCondition {
160 kEqual, 164 kEqual,
161 kNotEqual, 165 kNotEqual,
162 kSignedLessThan, 166 kSignedLessThan,
163 kSignedGreaterThanOrEqual, 167 kSignedGreaterThanOrEqual,
164 kSignedLessThanOrEqual, 168 kSignedLessThanOrEqual,
165 kSignedGreaterThan, 169 kSignedGreaterThan,
166 kUnsignedLessThan, 170 kUnsignedLessThan,
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182 kPositiveOrZero, 186 kPositiveOrZero,
183 kNegative 187 kNegative
184 }; 188 };
185 189
186 inline FlagsCondition NegateFlagsCondition(FlagsCondition condition) { 190 inline FlagsCondition NegateFlagsCondition(FlagsCondition condition) {
187 return static_cast<FlagsCondition>(condition ^ 1); 191 return static_cast<FlagsCondition>(condition ^ 1);
188 } 192 }
189 193
190 FlagsCondition CommuteFlagsCondition(FlagsCondition condition); 194 FlagsCondition CommuteFlagsCondition(FlagsCondition condition);
191 195
192 std::ostream& operator<<(std::ostream& os, const FlagsCondition& fc); 196 V8_EXPORT_PRIVATE std::ostream& operator<<(std::ostream& os,
197 const FlagsCondition& fc);
193 198
194 // The InstructionCode is an opaque, target-specific integer that encodes 199 // The InstructionCode is an opaque, target-specific integer that encodes
195 // what code to emit for an instruction in the code generator. It is not 200 // what code to emit for an instruction in the code generator. It is not
196 // interesting to the register allocator, as the inputs and flags on the 201 // interesting to the register allocator, as the inputs and flags on the
197 // instructions specify everything of interest. 202 // instructions specify everything of interest.
198 typedef int32_t InstructionCode; 203 typedef int32_t InstructionCode;
199 204
200 // Helpers for encoding / decoding InstructionCode into the fields needed 205 // Helpers for encoding / decoding InstructionCode into the fields needed
201 // for code generation. We encode the instruction, addressing mode, and flags 206 // for code generation. We encode the instruction, addressing mode, and flags
202 // continuation into a single InstructionCode which is stored as part of 207 // continuation into a single InstructionCode which is stored as part of
203 // the instruction. 208 // the instruction.
204 typedef BitField<ArchOpcode, 0, 8> ArchOpcodeField; 209 typedef BitField<ArchOpcode, 0, 8> ArchOpcodeField;
205 typedef BitField<AddressingMode, 8, 5> AddressingModeField; 210 typedef BitField<AddressingMode, 8, 5> AddressingModeField;
206 typedef BitField<FlagsMode, 13, 2> FlagsModeField; 211 typedef BitField<FlagsMode, 13, 2> FlagsModeField;
207 typedef BitField<FlagsCondition, 15, 5> FlagsConditionField; 212 typedef BitField<FlagsCondition, 15, 5> FlagsConditionField;
208 typedef BitField<int, 20, 12> MiscField; 213 typedef BitField<int, 20, 12> MiscField;
209 214
210 } // namespace compiler 215 } // namespace compiler
211 } // namespace internal 216 } // namespace internal
212 } // namespace v8 217 } // namespace v8
213 218
214 #endif // V8_COMPILER_INSTRUCTION_CODES_H_ 219 #endif // V8_COMPILER_INSTRUCTION_CODES_H_
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