Code patching for ARM64.

runtime/vm/constants_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_CONSTANTS_ARM64_H_
 #define VM_CONSTANTS_ARM64_H_
 
 #include "platform/assert.h"
 
 namespace dart {
@@ skipping 481 matching lines @@
   kImm9Shift = 12,
   kImm9Bits = 9,
   kImm12Shift = 10,
   kImm12Bits = 12,
   kImm12ShiftShift = 22,
   kImm12ShiftBits = 2,
   kImm14Shift = 5,
   kImm14Bits = 14,
   kImm16Shift = 5,
   kImm16Bits = 16,
+  kImm16Mask = 0xffff << kImm16Shift,
   kImm19Shift = 5,
   kImm19Bits = 19,
-  kImm19Mask = 0x7ffff,
+  kImm19Mask = 0x7ffff << kImm19Shift,
   kImm26Shift = 0,
   kImm26Bits = 26,
 
   kCondShift = 0,
   kCondBits = 4,
 
   // Bitfield immediates.
   kNShift = 22,
   kNBits = 1,
   kImmRShift = 16,
@@ skipping 63 matching lines @@
     kInstrSize = 4,
     kInstrSizeLog2 = 2,
     kPCReadOffset = 8
   };
 
   static const int32_t kNopInstruction = HINT;  // hint #0 === nop.
   static const int32_t kBreakPointInstruction =  // hlt #kImmExceptionIsDebug.
       HLT | (kImmExceptionIsDebug << kImm16Shift);
   static const int kBreakPointInstructionSize = kInstrSize;
 
+  // Read one particular bit out of the instruction bits.
+  inline int Bit(int nr) const {
+    return (InstructionBits() >> nr) & 1;
+  }
+
+  // Read a bit field out of the instruction bits.
+  inline int Bits(int shift, int count) const {
+    return (InstructionBits() >> shift) & ((1 << count) - 1);
+  }
+
   // Get the raw instruction bits.
   inline int32_t InstructionBits() const {
     return *reinterpret_cast<const int32_t*>(this);
   }
 
   // Set the raw instruction bits to value.
   inline void SetInstructionBits(int32_t value) {
     *reinterpret_cast<int32_t*>(this) = value;
   }
 
-  // Read one particular bit out of the instruction bits.
-  inline int Bit(int nr) const {
-    return (InstructionBits() >> nr) & 1;
+  inline void SetMoveWideBits(
+      MoveWideOp op, Register rd, uint16_t imm, int hw, OperandSize sz) {
+    ASSERT((hw >= 0) && (hw <= 3));
+    ASSERT((sz == kDoubleWord) || (sz == kWord));
+    const int32_t size = (sz == kDoubleWord) ? B31 : 0;
+    SetInstructionBits(
+        op | size |
+        (static_cast<int32_t>(rd) << kRdShift) |
+        (static_cast<int32_t>(hw) << kHWShift) |
+        (static_cast<int32_t>(imm) << kImm16Shift));
   }
 
-  // Read a bit field out of the instruction bits.
-  inline int Bits(int shift, int count) const {
-    return (InstructionBits() >> shift) & ((1 << count) - 1);
+  inline void SetUnconditionalBranchRegBits(
+      UnconditionalBranchRegOp op, Register rn) {
+    SetInstructionBits(
+        op |
+        (static_cast<int32_t>(rn) << kRnShift));
   }
 
   inline int NField() const { return Bit(22); }
   inline int SField() const { return Bit(kSShift); }
   inline int SFField() const { return Bit(kSFShift); }
   inline int SzField() const { return Bits(kSzShift, kSzBits); }
   inline Register RdField() const { return static_cast<Register>(
                                         Bits(kRdShift, kRdBits)); }
   inline Register RnField() const { return static_cast<Register>(
                                         Bits(kRnShift, kRnBits)); }
@@ skipping 155 matching lines @@
   static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
 
  private:
   DISALLOW_ALLOCATION();
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
 };
 
 }  // namespace dart
 
 #endif  // VM_CONSTANTS_ARM64_H_