| OLD | NEW |
| 1 ; This file checks support for comparing vector values with the fcmp | 1 ; This file checks support for comparing vector values with the fcmp |
| 2 ; instruction. | 2 ; instruction. |
| 3 | 3 |
| 4 ; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 | FileCheck %s | 4 ; RUN: %p2i -i %s --filetype=obj --disassemble -a -O2 | FileCheck %s |
| 5 ; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 | FileCheck %s | 5 ; RUN: %p2i -i %s --filetype=obj --disassemble -a -Om1 | FileCheck %s |
| 6 | 6 |
| 7 ; RUN: %if --need=target_MIPS32 --need=allow_dump \ |
| 8 ; RUN: --command %p2i --filetype=asm --assemble --disassemble --target mips32\ |
| 9 ; RUN: -i %s --args -O2 --skip-unimplemented \ |
| 10 ; RUN: | %if --need=target_MIPS32 --need=allow_dump \ |
| 11 ; RUN: --command FileCheck --check-prefix MIPS32 %s |
| 12 |
| 7 ; Check that sext elimination occurs when the result of the comparison | 13 ; Check that sext elimination occurs when the result of the comparison |
| 8 ; instruction is alrady sign extended. Sign extension to 4 x i32 uses | 14 ; instruction is alrady sign extended. Sign extension to 4 x i32 uses |
| 9 ; the pslld instruction. | 15 ; the pslld instruction. |
| 10 define internal <4 x i32> @sextElimination(<4 x float> %a, <4 x float> %b) { | 16 define internal <4 x i32> @sextElimination(<4 x float> %a, <4 x float> %b) { |
| 11 entry: | 17 entry: |
| 12 %res.trunc = fcmp oeq <4 x float> %a, %b | 18 %res.trunc = fcmp oeq <4 x float> %a, %b |
| 13 %res = sext <4 x i1> %res.trunc to <4 x i32> | 19 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 14 ret <4 x i32> %res | 20 ret <4 x i32> %res |
| 15 ; CHECK-LABEL: sextElimination | 21 ; CHECK-LABEL: sextElimination |
| 16 ; CHECK: cmpeqps | 22 ; CHECK: cmpeqps |
| 17 ; CHECK-NOT: pslld | 23 ; CHECK-NOT: pslld |
| 18 } | 24 } |
| 25 ; MIPS32-LABEL: sextElimination |
| 26 ; MIPS32: c.eq.s |
| 27 ; MIPS32: li [[R:.*]],1 |
| 28 ; MIPS32: movf [[R]],zero,$fcc0 |
| 29 ; MIPS32: c.eq.s |
| 30 ; MIPS32: li [[R:.*]],1 |
| 31 ; MIPS32: movf [[R]],zero,$fcc0 |
| 32 ; MIPS32: c.eq.s |
| 33 ; MIPS32: li [[R:.*]],1 |
| 34 ; MIPS32: movf [[R]],zero,$fcc0 |
| 35 ; MIPS32: c.eq.s |
| 36 ; MIPS32: li [[R:.*]],1 |
| 37 ; MIPS32: movf [[R]],zero,$fcc0 |
| 19 | 38 |
| 20 define internal <4 x i32> @fcmpFalseVector(<4 x float> %a, <4 x float> %b) { | 39 define internal <4 x i32> @fcmpFalseVector(<4 x float> %a, <4 x float> %b) { |
| 21 entry: | 40 entry: |
| 22 %res.trunc = fcmp false <4 x float> %a, %b | 41 %res.trunc = fcmp false <4 x float> %a, %b |
| 23 %res = sext <4 x i1> %res.trunc to <4 x i32> | 42 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 24 ret <4 x i32> %res | 43 ret <4 x i32> %res |
| 25 ; CHECK-LABEL: fcmpFalseVector | 44 ; CHECK-LABEL: fcmpFalseVector |
| 26 ; CHECK: pxor | 45 ; CHECK: pxor |
| 27 } | 46 } |
| 47 ; MIPS32-LABEL: fcmpFalseVector |
| 48 ; MIPS32: li v0,0 |
| 49 ; MIPS32: li v1,0 |
| 50 ; MIPS32: li a0,0 |
| 51 ; MIPS32: li a1,0 |
| 28 | 52 |
| 29 define internal <4 x i32> @fcmpOeqVector(<4 x float> %a, <4 x float> %b) { | 53 define internal <4 x i32> @fcmpOeqVector(<4 x float> %a, <4 x float> %b) { |
| 30 entry: | 54 entry: |
| 31 %res.trunc = fcmp oeq <4 x float> %a, %b | 55 %res.trunc = fcmp oeq <4 x float> %a, %b |
| 32 %res = sext <4 x i1> %res.trunc to <4 x i32> | 56 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 33 ret <4 x i32> %res | 57 ret <4 x i32> %res |
| 34 ; CHECK-LABEL: fcmpOeqVector | 58 ; CHECK-LABEL: fcmpOeqVector |
| 35 ; CHECK: cmpeqps | 59 ; CHECK: cmpeqps |
| 36 } | 60 } |
| 61 ; MIPS32-LABEL: fcmpOeqVector |
| 62 ; MIPS32: c.eq.s |
| 63 ; MIPS32: li [[R:.*]],1 |
| 64 ; MIPS32: movf [[R]],zero,$fcc0 |
| 65 ; MIPS32: c.eq.s |
| 66 ; MIPS32: li [[R:.*]],1 |
| 67 ; MIPS32: movf [[R]],zero,$fcc0 |
| 68 ; MIPS32: c.eq.s |
| 69 ; MIPS32: li [[R:.*]],1 |
| 70 ; MIPS32: movf [[R]],zero,$fcc0 |
| 71 ; MIPS32: c.eq.s |
| 72 ; MIPS32: li [[R:.*]],1 |
| 73 ; MIPS32: movf [[R]],zero,$fcc0 |
| 37 | 74 |
| 38 define internal <4 x i32> @fcmpOgeVector(<4 x float> %a, <4 x float> %b) { | 75 define internal <4 x i32> @fcmpOgeVector(<4 x float> %a, <4 x float> %b) { |
| 39 entry: | 76 entry: |
| 40 %res.trunc = fcmp oge <4 x float> %a, %b | 77 %res.trunc = fcmp oge <4 x float> %a, %b |
| 41 %res = sext <4 x i1> %res.trunc to <4 x i32> | 78 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 42 ret <4 x i32> %res | 79 ret <4 x i32> %res |
| 43 ; CHECK-LABEL: fcmpOgeVector | 80 ; CHECK-LABEL: fcmpOgeVector |
| 44 ; CHECK: cmpleps | 81 ; CHECK: cmpleps |
| 45 } | 82 } |
| 83 ; MIPS32-LABEL: fcmpOgeVector |
| 84 ; MIPS32: c.ult.s |
| 85 ; MIPS32: li [[R:.*]],1 |
| 86 ; MIPS32: movt [[R]],zero,$fcc0 |
| 87 ; MIPS32: c.ult.s |
| 88 ; MIPS32: li [[R:.*]],1 |
| 89 ; MIPS32: movt [[R]],zero,$fcc0 |
| 90 ; MIPS32: c.ult.s |
| 91 ; MIPS32: li [[R:.*]],1 |
| 92 ; MIPS32: movt [[R]],zero,$fcc0 |
| 93 ; MIPS32: c.ult.s |
| 94 ; MIPS32: li [[R:.*]],1 |
| 95 ; MIPS32: movt [[R]],zero,$fcc0 |
| 46 | 96 |
| 47 define internal <4 x i32> @fcmpOgtVector(<4 x float> %a, <4 x float> %b) { | 97 define internal <4 x i32> @fcmpOgtVector(<4 x float> %a, <4 x float> %b) { |
| 48 entry: | 98 entry: |
| 49 %res.trunc = fcmp ogt <4 x float> %a, %b | 99 %res.trunc = fcmp ogt <4 x float> %a, %b |
| 50 %res = sext <4 x i1> %res.trunc to <4 x i32> | 100 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 51 ret <4 x i32> %res | 101 ret <4 x i32> %res |
| 52 ; CHECK-LABEL: fcmpOgtVector | 102 ; CHECK-LABEL: fcmpOgtVector |
| 53 ; CHECK: cmpltps | 103 ; CHECK: cmpltps |
| 54 } | 104 } |
| 105 ; MIPS32-LABEL: fcmpOgtVector |
| 106 ; MIPS32: c.ule.s |
| 107 ; MIPS32: li [[R:.*]],1 |
| 108 ; MIPS32: movt [[R]],zero,$fcc0 |
| 109 ; MIPS32: c.ule.s |
| 110 ; MIPS32: li [[R:.*]],1 |
| 111 ; MIPS32: movt [[R]],zero,$fcc0 |
| 112 ; MIPS32: c.ule.s |
| 113 ; MIPS32: li [[R:.*]],1 |
| 114 ; MIPS32: movt [[R]],zero,$fcc0 |
| 115 ; MIPS32: c.ule.s |
| 116 ; MIPS32: li [[R:.*]],1 |
| 117 ; MIPS32: movt [[R]],zero,$fcc0 |
| 55 | 118 |
| 56 define internal <4 x i32> @fcmpOleVector(<4 x float> %a, <4 x float> %b) { | 119 define internal <4 x i32> @fcmpOleVector(<4 x float> %a, <4 x float> %b) { |
| 57 entry: | 120 entry: |
| 58 %res.trunc = fcmp ole <4 x float> %a, %b | 121 %res.trunc = fcmp ole <4 x float> %a, %b |
| 59 %res = sext <4 x i1> %res.trunc to <4 x i32> | 122 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 60 ret <4 x i32> %res | 123 ret <4 x i32> %res |
| 61 ; CHECK-LABEL: fcmpOleVector | 124 ; CHECK-LABEL: fcmpOleVector |
| 62 ; CHECK: cmpleps | 125 ; CHECK: cmpleps |
| 63 } | 126 } |
| 127 ; MIPS32-LABEL: fcmpOleVector |
| 128 ; MIPS32: c.ole.s |
| 129 ; MIPS32: li [[R:.*]],1 |
| 130 ; MIPS32: movf [[R]],zero,$fcc0 |
| 131 ; MIPS32: c.ole.s |
| 132 ; MIPS32: li [[R:.*]],1 |
| 133 ; MIPS32: movf [[R]],zero,$fcc0 |
| 134 ; MIPS32: c.ole.s |
| 135 ; MIPS32: li [[R:.*]],1 |
| 136 ; MIPS32: movf [[R]],zero,$fcc0 |
| 137 ; MIPS32: c.ole.s |
| 138 ; MIPS32: li [[R:.*]],1 |
| 139 ; MIPS32: movf [[R]],zero,$fcc0 |
| 64 | 140 |
| 65 define internal <4 x i32> @fcmpOltVector(<4 x float> %a, <4 x float> %b) { | 141 define internal <4 x i32> @fcmpOltVector(<4 x float> %a, <4 x float> %b) { |
| 66 entry: | 142 entry: |
| 67 %res.trunc = fcmp olt <4 x float> %a, %b | 143 %res.trunc = fcmp olt <4 x float> %a, %b |
| 68 %res = sext <4 x i1> %res.trunc to <4 x i32> | 144 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 69 ret <4 x i32> %res | 145 ret <4 x i32> %res |
| 70 ; CHECK-LABEL: fcmpOltVector | 146 ; CHECK-LABEL: fcmpOltVector |
| 71 ; CHECK: cmpltps | 147 ; CHECK: cmpltps |
| 72 } | 148 } |
| 149 ; MIPS32-LABEL: fcmpOltVector |
| 150 ; MIPS32: c.olt.s |
| 151 ; MIPS32: li [[R:.*]],1 |
| 152 ; MIPS32: movf [[R]],zero,$fcc0 |
| 153 ; MIPS32: c.olt.s |
| 154 ; MIPS32: li [[R:.*]],1 |
| 155 ; MIPS32: movf [[R]],zero,$fcc0 |
| 156 ; MIPS32: c.olt.s |
| 157 ; MIPS32: li [[R:.*]],1 |
| 158 ; MIPS32: movf [[R]],zero,$fcc0 |
| 159 ; MIPS32: c.olt.s |
| 160 ; MIPS32: li [[R:.*]],1 |
| 161 ; MIPS32: movf [[R]],zero,$fcc0 |
| 73 | 162 |
| 74 define internal <4 x i32> @fcmpOneVector(<4 x float> %a, <4 x float> %b) { | 163 define internal <4 x i32> @fcmpOneVector(<4 x float> %a, <4 x float> %b) { |
| 75 entry: | 164 entry: |
| 76 %res.trunc = fcmp one <4 x float> %a, %b | 165 %res.trunc = fcmp one <4 x float> %a, %b |
| 77 %res = sext <4 x i1> %res.trunc to <4 x i32> | 166 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 78 ret <4 x i32> %res | 167 ret <4 x i32> %res |
| 79 ; CHECK-LABEL: fcmpOneVector | 168 ; CHECK-LABEL: fcmpOneVector |
| 80 ; CHECK: cmpneqps | 169 ; CHECK: cmpneqps |
| 81 ; CHECK: cmpordps | 170 ; CHECK: cmpordps |
| 82 ; CHECK: pand | 171 ; CHECK: pand |
| 83 } | 172 } |
| 173 ; MIPS32-LABEL: fcmpOneVector |
| 174 ; MIPS32: c.ueq.s |
| 175 ; MIPS32: li [[R:.*]],1 |
| 176 ; MIPS32: movt [[R]],zero,$fcc0 |
| 177 ; MIPS32: c.ueq.s |
| 178 ; MIPS32: li [[R:.*]],1 |
| 179 ; MIPS32: movt [[R]],zero,$fcc0 |
| 180 ; MIPS32: c.ueq.s |
| 181 ; MIPS32: li [[R:.*]],1 |
| 182 ; MIPS32: movt [[R]],zero,$fcc0 |
| 183 ; MIPS32: c.ueq.s |
| 184 ; MIPS32: li [[R:.*]],1 |
| 185 ; MIPS32: movt [[R]],zero,$fcc0 |
| 84 | 186 |
| 85 define internal <4 x i32> @fcmpOrdVector(<4 x float> %a, <4 x float> %b) { | 187 define internal <4 x i32> @fcmpOrdVector(<4 x float> %a, <4 x float> %b) { |
| 86 entry: | 188 entry: |
| 87 %res.trunc = fcmp ord <4 x float> %a, %b | 189 %res.trunc = fcmp ord <4 x float> %a, %b |
| 88 %res = sext <4 x i1> %res.trunc to <4 x i32> | 190 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 89 ret <4 x i32> %res | 191 ret <4 x i32> %res |
| 90 ; CHECK-LABEL: fcmpOrdVector | 192 ; CHECK-LABEL: fcmpOrdVector |
| 91 ; CHECK: cmpordps | 193 ; CHECK: cmpordps |
| 92 } | 194 } |
| 195 ; MIPS32-LABEL: fcmpOrdVector |
| 196 ; MIPS32: c.un.s |
| 197 ; MIPS32: li [[R:.*]],1 |
| 198 ; MIPS32: movt [[R]],zero,$fcc0 |
| 199 ; MIPS32: c.un.s |
| 200 ; MIPS32: li [[R:.*]],1 |
| 201 ; MIPS32: movt [[R]],zero,$fcc0 |
| 202 ; MIPS32: c.un.s |
| 203 ; MIPS32: li [[R:.*]],1 |
| 204 ; MIPS32: movt [[R]],zero,$fcc0 |
| 205 ; MIPS32: c.un.s |
| 206 ; MIPS32: li [[R:.*]],1 |
| 207 ; MIPS32: movt [[R]],zero,$fcc0 |
| 93 | 208 |
| 94 define internal <4 x i32> @fcmpTrueVector(<4 x float> %a, <4 x float> %b) { | 209 define internal <4 x i32> @fcmpTrueVector(<4 x float> %a, <4 x float> %b) { |
| 95 entry: | 210 entry: |
| 96 %res.trunc = fcmp true <4 x float> %a, %b | 211 %res.trunc = fcmp true <4 x float> %a, %b |
| 97 %res = sext <4 x i1> %res.trunc to <4 x i32> | 212 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 98 ret <4 x i32> %res | 213 ret <4 x i32> %res |
| 99 ; CHECK-LABEL: fcmpTrueVector | 214 ; CHECK-LABEL: fcmpTrueVector |
| 100 ; CHECK: pcmpeqd | 215 ; CHECK: pcmpeqd |
| 101 } | 216 } |
| 217 ; MIPS32-LABEL: fcmpTrueVector |
| 218 ; MIPS32: li v0,1 |
| 219 ; MIPS32: li v1,1 |
| 220 ; MIPS32: li a0,1 |
| 221 ; MIPS32: li a1,1 |
| 102 | 222 |
| 103 define internal <4 x i32> @fcmpUeqVector(<4 x float> %a, <4 x float> %b) { | 223 define internal <4 x i32> @fcmpUeqVector(<4 x float> %a, <4 x float> %b) { |
| 104 entry: | 224 entry: |
| 105 %res.trunc = fcmp ueq <4 x float> %a, %b | 225 %res.trunc = fcmp ueq <4 x float> %a, %b |
| 106 %res = sext <4 x i1> %res.trunc to <4 x i32> | 226 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 107 ret <4 x i32> %res | 227 ret <4 x i32> %res |
| 108 ; CHECK-LABEL: fcmpUeqVector | 228 ; CHECK-LABEL: fcmpUeqVector |
| 109 ; CHECK: cmpeqps | 229 ; CHECK: cmpeqps |
| 110 ; CHECK: cmpunordps | 230 ; CHECK: cmpunordps |
| 111 ; CHECK: por | 231 ; CHECK: por |
| 112 } | 232 } |
| 233 ; MIPS32-LABEL: fcmpUeqVector |
| 234 ; MIPS32: c.ueq.s |
| 235 ; MIPS32: li [[R:.*]],1 |
| 236 ; MIPS32: movf [[R]],zero,$fcc0 |
| 237 ; MIPS32: c.ueq.s |
| 238 ; MIPS32: li [[R:.*]],1 |
| 239 ; MIPS32: movf [[R]],zero,$fcc0 |
| 240 ; MIPS32: c.ueq.s |
| 241 ; MIPS32: li [[R:.*]],1 |
| 242 ; MIPS32: movf [[R]],zero,$fcc0 |
| 243 ; MIPS32: c.ueq.s |
| 244 ; MIPS32: li [[R:.*]],1 |
| 245 ; MIPS32: movf [[R]],zero,$fcc0 |
| 113 | 246 |
| 114 define internal <4 x i32> @fcmpUgeVector(<4 x float> %a, <4 x float> %b) { | 247 define internal <4 x i32> @fcmpUgeVector(<4 x float> %a, <4 x float> %b) { |
| 115 entry: | 248 entry: |
| 116 %res.trunc = fcmp uge <4 x float> %a, %b | 249 %res.trunc = fcmp uge <4 x float> %a, %b |
| 117 %res = sext <4 x i1> %res.trunc to <4 x i32> | 250 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 118 ret <4 x i32> %res | 251 ret <4 x i32> %res |
| 119 ; CHECK-LABEL: fcmpUgeVector | 252 ; CHECK-LABEL: fcmpUgeVector |
| 120 ; CHECK: cmpnltps | 253 ; CHECK: cmpnltps |
| 121 } | 254 } |
| 255 ; MIPS32-LABEL: fcmpUgeVector |
| 256 ; MIPS32: c.olt.s |
| 257 ; MIPS32: li [[R:.*]],1 |
| 258 ; MIPS32: movt [[R]],zero,$fcc0 |
| 259 ; MIPS32: c.olt.s |
| 260 ; MIPS32: li [[R:.*]],1 |
| 261 ; MIPS32: movt [[R]],zero,$fcc0 |
| 262 ; MIPS32: c.olt.s |
| 263 ; MIPS32: li [[R:.*]],1 |
| 264 ; MIPS32: movt [[R]],zero,$fcc0 |
| 265 ; MIPS32: c.olt.s |
| 266 ; MIPS32: li [[R:.*]],1 |
| 267 ; MIPS32: movt [[R]],zero,$fcc0 |
| 122 | 268 |
| 123 define internal <4 x i32> @fcmpUgtVector(<4 x float> %a, <4 x float> %b) { | 269 define internal <4 x i32> @fcmpUgtVector(<4 x float> %a, <4 x float> %b) { |
| 124 entry: | 270 entry: |
| 125 %res.trunc = fcmp ugt <4 x float> %a, %b | 271 %res.trunc = fcmp ugt <4 x float> %a, %b |
| 126 %res = sext <4 x i1> %res.trunc to <4 x i32> | 272 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 127 ret <4 x i32> %res | 273 ret <4 x i32> %res |
| 128 ; CHECK-LABEL: fcmpUgtVector | 274 ; CHECK-LABEL: fcmpUgtVector |
| 129 ; CHECK: cmpnleps | 275 ; CHECK: cmpnleps |
| 130 } | 276 } |
| 277 ; MIPS32-LABEL: fcmpUgtVector |
| 278 ; MIPS32: c.ole.s |
| 279 ; MIPS32: li [[R:.*]],1 |
| 280 ; MIPS32: movt [[R]],zero,$fcc0 |
| 281 ; MIPS32: c.ole.s |
| 282 ; MIPS32: li [[R:.*]],1 |
| 283 ; MIPS32: movt [[R]],zero,$fcc0 |
| 284 ; MIPS32: c.ole.s |
| 285 ; MIPS32: li [[R:.*]],1 |
| 286 ; MIPS32: movt [[R]],zero,$fcc0 |
| 287 ; MIPS32: c.ole.s |
| 288 ; MIPS32: li [[R:.*]],1 |
| 289 ; MIPS32: movt [[R]],zero,$fcc0 |
| 131 | 290 |
| 132 define internal <4 x i32> @fcmpUleVector(<4 x float> %a, <4 x float> %b) { | 291 define internal <4 x i32> @fcmpUleVector(<4 x float> %a, <4 x float> %b) { |
| 133 entry: | 292 entry: |
| 134 %res.trunc = fcmp ule <4 x float> %a, %b | 293 %res.trunc = fcmp ule <4 x float> %a, %b |
| 135 %res = sext <4 x i1> %res.trunc to <4 x i32> | 294 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 136 ret <4 x i32> %res | 295 ret <4 x i32> %res |
| 137 ; CHECK-LABEL: fcmpUleVector | 296 ; CHECK-LABEL: fcmpUleVector |
| 138 ; CHECK: cmpnltps | 297 ; CHECK: cmpnltps |
| 139 } | 298 } |
| 299 ; MIPS32-LABEL: fcmpUleVector |
| 300 ; MIPS32: c.ule.s |
| 301 ; MIPS32: li [[R:.*]],1 |
| 302 ; MIPS32: movf [[R]],zero,$fcc0 |
| 303 ; MIPS32: c.ule.s |
| 304 ; MIPS32: li [[R:.*]],1 |
| 305 ; MIPS32: movf [[R]],zero,$fcc0 |
| 306 ; MIPS32: c.ule.s |
| 307 ; MIPS32: li [[R:.*]],1 |
| 308 ; MIPS32: movf [[R]],zero,$fcc0 |
| 309 ; MIPS32: c.ule.s |
| 310 ; MIPS32: li [[R:.*]],1 |
| 311 ; MIPS32: movf [[R]],zero,$fcc0 |
| 140 | 312 |
| 141 define internal <4 x i32> @fcmpUltVector(<4 x float> %a, <4 x float> %b) { | 313 define internal <4 x i32> @fcmpUltVector(<4 x float> %a, <4 x float> %b) { |
| 142 entry: | 314 entry: |
| 143 %res.trunc = fcmp ult <4 x float> %a, %b | 315 %res.trunc = fcmp ult <4 x float> %a, %b |
| 144 %res = sext <4 x i1> %res.trunc to <4 x i32> | 316 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 145 ret <4 x i32> %res | 317 ret <4 x i32> %res |
| 146 ; CHECK-LABEL: fcmpUltVector | 318 ; CHECK-LABEL: fcmpUltVector |
| 147 ; CHECK: cmpnleps | 319 ; CHECK: cmpnleps |
| 148 } | 320 } |
| 321 ; MIPS32-LABEL: fcmpUltVector |
| 322 ; MIPS32: c.ult.s |
| 323 ; MIPS32: li [[R:.*]],1 |
| 324 ; MIPS32: movf [[R]],zero,$fcc0 |
| 325 ; MIPS32: c.ult.s |
| 326 ; MIPS32: li [[R:.*]],1 |
| 327 ; MIPS32: movf [[R]],zero,$fcc0 |
| 328 ; MIPS32: c.ult.s |
| 329 ; MIPS32: li [[R:.*]],1 |
| 330 ; MIPS32: movf [[R]],zero,$fcc0 |
| 331 ; MIPS32: c.ult.s |
| 332 ; MIPS32: li [[R:.*]],1 |
| 333 ; MIPS32: movf [[R]],zero,$fcc0 |
| 149 | 334 |
| 150 define internal <4 x i32> @fcmpUneVector(<4 x float> %a, <4 x float> %b) { | 335 define internal <4 x i32> @fcmpUneVector(<4 x float> %a, <4 x float> %b) { |
| 151 entry: | 336 entry: |
| 152 %res.trunc = fcmp une <4 x float> %a, %b | 337 %res.trunc = fcmp une <4 x float> %a, %b |
| 153 %res = sext <4 x i1> %res.trunc to <4 x i32> | 338 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 154 ret <4 x i32> %res | 339 ret <4 x i32> %res |
| 155 ; CHECK-LABEL: fcmpUneVector | 340 ; CHECK-LABEL: fcmpUneVector |
| 156 ; CHECK: cmpneqps | 341 ; CHECK: cmpneqps |
| 157 } | 342 } |
| 343 ; MIPS32-LABEL: fcmpUneVector |
| 344 ; MIPS32: c.eq.s |
| 345 ; MIPS32: li [[R:.*]],1 |
| 346 ; MIPS32: movt [[R]],zero,$fcc0 |
| 347 ; MIPS32: c.eq.s |
| 348 ; MIPS32: li [[R:.*]],1 |
| 349 ; MIPS32: movt [[R]],zero,$fcc0 |
| 350 ; MIPS32: c.eq.s |
| 351 ; MIPS32: li [[R:.*]],1 |
| 352 ; MIPS32: movt [[R]],zero,$fcc0 |
| 353 ; MIPS32: c.eq.s |
| 354 ; MIPS32: li [[R:.*]],1 |
| 355 ; MIPS32: movt [[R]],zero,$fcc0 |
| 158 | 356 |
| 159 define internal <4 x i32> @fcmpUnoVector(<4 x float> %a, <4 x float> %b) { | 357 define internal <4 x i32> @fcmpUnoVector(<4 x float> %a, <4 x float> %b) { |
| 160 entry: | 358 entry: |
| 161 %res.trunc = fcmp uno <4 x float> %a, %b | 359 %res.trunc = fcmp uno <4 x float> %a, %b |
| 162 %res = sext <4 x i1> %res.trunc to <4 x i32> | 360 %res = sext <4 x i1> %res.trunc to <4 x i32> |
| 163 ret <4 x i32> %res | 361 ret <4 x i32> %res |
| 164 ; CHECK-LABEL: fcmpUnoVector | 362 ; CHECK-LABEL: fcmpUnoVector |
| 165 ; CHECK: cmpunordps | 363 ; CHECK: cmpunordps |
| 166 } | 364 } |
| 365 ; MIPS32-LABEL: fcmpUnoVector |
| 366 ; MIPS32: c.un.s |
| 367 ; MIPS32: li [[R:.*]],1 |
| 368 ; MIPS32: movf [[R]],zero,$fcc0 |
| 369 ; MIPS32: c.un.s |
| 370 ; MIPS32: li [[R:.*]],1 |
| 371 ; MIPS32: movf [[R]],zero,$fcc0 |
| 372 ; MIPS32: c.un.s |
| 373 ; MIPS32: li [[R:.*]],1 |
| 374 ; MIPS32: movf [[R]],zero,$fcc0 |
| 375 ; MIPS32: c.un.s |
| 376 ; MIPS32: li [[R:.*]],1 |
| 377 ; MIPS32: movf [[R]],zero,$fcc0 |
| OLD | NEW |