[SubZero] Implement Fcmp, ICmp, Cast and Select for vector type

tests_lit/llvm2ice_tests/fp.cmp.ll

 ; This tries to be a comprehensive test of f32 and f64 compare operations.
 
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
 ; RUN:   -allow-externally-defined-symbols | FileCheck %s
 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 \
 ; RUN:   -allow-externally-defined-symbols | FileCheck %s \
 ; RUN:   --check-prefix=CHECK-OM1
 
 ; RUN: %if --need=target_ARM32 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target arm32 -i %s --args -O2 \
@@ skipping 361 matching lines @@
 entry:
   %cmp = fcmp false float %a, %b
   %cmp.ret_ext = zext i1 %cmp to i32
   ret i32 %cmp.ret_ext
 }
 ; CHECK-LABEL: fcmpFalseFloat
 ; CHECK: mov {{.*}},0x0
 ; ARM32-LABEL: fcmpFalseFloat
 ; ARM32: mov [[R:r[0-9]+]], #0
 ; MIPS32-LABEL: fcmpFalseFloat
-; MIPS32: addiu
-; MIPS32: sb
+; MIPS32: addiu [[R:.*]], $zero, 0
+; MIPS32: andi [[R]], [[R]], 1
 
 define internal i32 @fcmpFalseDouble(double %a, double %b) {
 entry:
   %cmp = fcmp false double %a, %b
   %cmp.ret_ext = zext i1 %cmp to i32
   ret i32 %cmp.ret_ext
 }
 ; CHECK-LABEL: fcmpFalseDouble
 ; CHECK: mov {{.*}},0x0
 ; ARM32-LABEL: fcmpFalseDouble
 ; ARM32: mov [[R:r[0-9]+]], #0
 ; MIPS32-LABEL: fcmpFalseDouble
-; MIPS32: addiu
-; MIPS32: sb
+; MIPS32: addiu [[R:.*]], $zero, 0
+; MIPS32: andi [[R]], [[R]], 1
 
 define internal i32 @fcmpOeqFloat(float %a, float %b) {
 entry:
   %cmp = fcmp oeq float %a, %b
   %cmp.ret_ext = zext i1 %cmp to i32
   ret i32 %cmp.ret_ext
 }
 ; CHECK-LABEL: fcmpOeqFloat
 ; CHECK: ucomiss
 ; CHECK: jne
@@ skipping 560 matching lines @@
 entry:
   %cmp = fcmp true float %a, %b
   %cmp.ret_ext = zext i1 %cmp to i32
   ret i32 %cmp.ret_ext
 }
 ; CHECK-LABEL: fcmpTrueFloat
 ; CHECK: mov {{.*}},0x1
 ; ARM32-LABEL: fcmpTrueFloat
 ; ARM32: mov {{r[0-9]+}}, #1
 ; MIPS32-LABEL: fcmpTrueFloat
-; MIPS32: addiu
-; MIPS32: sb
+; MIPS32: addiu [[R:.*]], $zero, 1
+; MIPS32: andi [[R]], [[R]], 1
 
 define internal i32 @fcmpTrueDouble(double %a, double %b) {
 entry:
   %cmp = fcmp true double %a, %b
   %cmp.ret_ext = zext i1 %cmp to i32
   ret i32 %cmp.ret_ext
 }
 ; CHECK-LABEL: fcmpTrueDouble
 ; CHECK: mov {{.*}},0x1
 ; ARM32-LABEL: fcmpTrueDouble
 ; ARM32: mov {{r[0-9]+}}, #1
 ; MIPS32-LABEL: fcmpTrueDouble
-; MIPS32: addiu
-; MIPS32: sb
+; MIPS32: addiu [[R:.*]], $zero, 1
+; MIPS32: andi [[R]], [[R]], 1
 
 define internal float @selectFloatVarVar(float %a, float %b) {
 entry:
   %cmp = fcmp olt float %a, %b
   %cond = select i1 %cmp, float %a, float %b
   ret float %cond
 }
 ; CHECK-LABEL: selectFloatVarVar
 ; CHECK: movss
 ; CHECK: ucomiss
@@ skipping 18 matching lines @@
 ; CHECK: ucomisd
 ; CHECK: ja
 ; CHECK: movsd
 ; ARM32-LABEL: selectDoubleVarVar
 ; ARM32: vcmp.f64
 ; ARM32-OM1: vmovne.f64 d{{[0-9]+}}
 ; ARM32-O2: vmovmi.f64 d{{[0-9]+}}
 ; ARM32: bx
 ; MIPS32-LABEL: selectDoubleVarVar
 ; MIPS32: movn.d {{.*}}