[SubZero] Legalize load, store for MIPS post lower

src/IceTargetLoweringMIPS32.cpp

 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
@@ skipping 1511 matching lines @@
     Variable *Base, int32_t Offset, RegNumT ScratchRegNum) {
   // Legalize will likely need a lui/ori combination, but if the top bits are
   // all 0 from negating the offset and subtracting, we could use that instead.
   const bool ShouldSub = Offset != 0 && (-Offset & 0xFFFF0000) == 0;
   Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum);
   if (ShouldSub) {
     Variable *OffsetVal = Target->legalizeToReg(
         Target->Ctx->getConstantInt32(-Offset), ScratchRegNum);
     Target->_sub(ScratchReg, Base, OffsetVal);
   } else {
-    Target->_addiu(ScratchReg, Base, Offset);
+    constexpr bool SignExt = true;
+    if (!OperandMIPS32Mem::canHoldOffset(Base->getType(), SignExt, Offset)) {
+      const uint32_t UpperBits = (Offset >> 16) & 0xFFFF;
+      const uint32_t LowerBits = Offset & 0xFFFF;
+      Target->_lui(ScratchReg, Target->Ctx->getConstantInt32(UpperBits));
+      if (LowerBits)
+        Target->_ori(ScratchReg, ScratchReg, LowerBits);
+      Target->_addu(ScratchReg, ScratchReg, Base);
+    } else {
+      Target->_addiu(ScratchReg, Base, Offset);
+    }
   }
 
   return ScratchReg;
 }
 
 void TargetMIPS32::PostLoweringLegalizer::legalizeMov(InstMIPS32Mov *MovInstr) {
   Variable *Dest = MovInstr->getDest();
   assert(Dest != nullptr);
   const Type DestTy = Dest->getType();
   assert(DestTy != IceType_i64);
@@ skipping 181 matching lines @@
   }
 
   if (Legalized) {
     if (MovInstr->isDestRedefined()) {
       Target->_set_dest_redefined();
     }
     MovInstr->setDeleted();
   }
 }
 
+OperandMIPS32Mem *
+TargetMIPS32::PostLoweringLegalizer::legalizeMemOperand(OperandMIPS32Mem *Mem) {
+  if (llvm::isa<ConstantRelocatable>(Mem->getOffset())) {
+    return nullptr;
+  }
+  Variable *Base = Mem->getBase();
+  auto *Ci32 = llvm::cast<ConstantInteger32>(Mem->getOffset());
+  int32_t Offset = Ci32->getValue();
+
+  if (Base->isRematerializable()) {
+    const int32_t ExtraOffset =
+        (Base->getRegNum() == Target->getFrameOrStackReg())
+            ? Target->getFrameFixedAllocaOffset()
+            : 0;
+    Offset += Base->getStackOffset() + ExtraOffset;
+    Base = Target->getPhysicalRegister(Base->getRegNum());
+  }
+
+  constexpr bool SignExt = true;
+  if (!OperandMIPS32Mem::canHoldOffset(Mem->getType(), SignExt, Offset)) {
+    Base = newBaseRegister(Base, Offset, Target->getReservedTmpReg());
+    Offset = 0;
+  }
+
+  return OperandMIPS32Mem::create(
+      Target->Func, Mem->getType(), Base,
+      llvm::cast<ConstantInteger32>(Target->Ctx->getConstantInt32(Offset)));
+}
+
 void TargetMIPS32::postLowerLegalization() {
   Func->dump("Before postLowerLegalization");
   assert(hasComputedFrame());
   for (CfgNode *Node : Func->getNodes()) {
     Context.init(Node);
     PostLoweringLegalizer Legalizer(this);
     while (!Context.atEnd()) {
       PostIncrLoweringContext PostIncrement(Context);
       Inst *CurInstr = iteratorToInst(Context.getCur());
-
-      // TODO(sagar.thakur): Add remaining cases of legalization.
-
+      const SizeT NumSrcs = CurInstr->getSrcSize();
+      Operand *Src0 = NumSrcs < 1 ? nullptr : CurInstr->getSrc(0);
+      Operand *Src1 = NumSrcs < 2 ? nullptr : CurInstr->getSrc(1);
+      auto *Src0V = llvm::dyn_cast_or_null<Variable>(Src0);
+      auto *Src0M = llvm::dyn_cast_or_null<OperandMIPS32Mem>(Src0);
+      auto *Src1M = llvm::dyn_cast_or_null<OperandMIPS32Mem>(Src1);
+      Variable *Dst = CurInstr->getDest();
       if (auto *MovInstr = llvm::dyn_cast<InstMIPS32Mov>(CurInstr)) {
         Legalizer.legalizeMov(MovInstr);
+        continue;
+      }
+      if (llvm::isa<InstMIPS32Sw>(CurInstr)) {
+        if (auto *LegalMem = Legalizer.legalizeMemOperand(Src1M)) {
+          _sw(Src0V, LegalMem);
+          CurInstr->setDeleted();
+        }
+        continue;
+      }
+      if (llvm::isa<InstMIPS32Swc1>(CurInstr)) {
+        if (auto *LegalMem = Legalizer.legalizeMemOperand(Src1M)) {
+          _swc1(Src0V, LegalMem);
+          CurInstr->setDeleted();
+        }
+        continue;
+      }
+      if (llvm::isa<InstMIPS32Sdc1>(CurInstr)) {
+        if (auto *LegalMem = Legalizer.legalizeMemOperand(Src1M)) {
+          _sdc1(Src0V, LegalMem);
+          CurInstr->setDeleted();
+        }
+        continue;
+      }
+      if (llvm::isa<InstMIPS32Lw>(CurInstr)) {
+        if (auto *LegalMem = Legalizer.legalizeMemOperand(Src0M)) {
+          _lw(Dst, LegalMem);
+          CurInstr->setDeleted();
+        }
+        continue;
+      }
+      if (llvm::isa<InstMIPS32Lwc1>(CurInstr)) {
+        if (auto *LegalMem = Legalizer.legalizeMemOperand(Src0M)) {
+          _lwc1(Dst, LegalMem);
+          CurInstr->setDeleted();
+        }
+        continue;
+      }
+      if (llvm::isa<InstMIPS32Ldc1>(CurInstr)) {
+        if (auto *LegalMem = Legalizer.legalizeMemOperand(Src0M)) {
+          _ldc1(Dst, LegalMem);
+          CurInstr->setDeleted();
+        }
+        continue;
       }
     }
   }
 }
 
 Operand *TargetMIPS32::loOperand(Operand *Operand) {
   assert(Operand->getType() == IceType_i64);
   if (auto *Var64On32 = llvm::dyn_cast<Variable64On32>(Operand))
     return Var64On32->getLo();
   if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) {
@@ skipping 3242 matching lines @@
   Str << "\t.set\t"
       << "nomips16\n";
 }
 
 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
 
 } // end of namespace MIPS32
 } // end of namespace Ice