[SubZero] Legalize load, store for MIPS post lower

src/IceTargetLoweringMIPS32.h

 //===- subzero/src/IceTargetLoweringMIPS32.h - MIPS32 lowering ---*- C++-*-===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 ///
 /// \file
@@ skipping 72 matching lines @@
   const SmallBitVector &getAliasesForRegister(RegNumT Reg) const override {
     return RegisterAliases[Reg];
   }
   bool hasFramePointer() const override { return UsesFramePointer; }
   void setHasFramePointer() override { UsesFramePointer = true; }
   RegNumT getStackReg() const override { return RegMIPS32::Reg_SP; }
   RegNumT getFrameReg() const override { return RegMIPS32::Reg_FP; }
   RegNumT getFrameOrStackReg() const override {
     return UsesFramePointer ? getFrameReg() : getStackReg();
   }
+  RegNumT getReservedTmpReg() const { return RegMIPS32::Reg_AT; }
   size_t typeWidthInBytesOnStack(Type Ty) const override {
     // Round up to the next multiple of 4 bytes. In particular, i1, i8, and i16
     // are rounded up to 4 bytes.
     return (typeWidthInBytes(Ty) + 3) & ~3;
   }
   uint32_t getStackAlignment() const override;
   void reserveFixedAllocaArea(size_t Size, size_t Align) override {
     FixedAllocaSizeBytes = Size;
     assert(llvm::isPowerOf2_32(Align));
     FixedAllocaAlignBytes = Align;
@@ skipping 616 matching lines @@
   class PostLoweringLegalizer {
     PostLoweringLegalizer() = delete;
     PostLoweringLegalizer(const PostLoweringLegalizer &) = delete;
     PostLoweringLegalizer &operator=(const PostLoweringLegalizer &) = delete;
 
   public:
     explicit PostLoweringLegalizer(TargetMIPS32 *Target)
         : Target(Target), StackOrFrameReg(Target->getPhysicalRegister(
                               Target->getFrameOrStackReg())) {}
 
+    /// Legalizes Mem. if Mem.Base is a rematerializable variable,
+    /// Mem.Offset is fixed up.
+    OperandMIPS32Mem *legalizeMemOperand(OperandMIPS32Mem *Mem);
+
     /// Legalizes Mov if its Source (or Destination) is a spilled Variable, or
     /// if its Source is a Rematerializable variable (this form is used in lieu
     /// of lea, which is not available in MIPS.)
     ///
     /// Moves to memory become store instructions, and moves from memory, loads.
     void legalizeMov(InstMIPS32Mov *Mov);
 
   private:
     /// Creates a new Base register centered around [Base, +/- Offset].
     Variable *newBaseRegister(Variable *Base, int32_t Offset,
@@ skipping 129 matching lines @@
   explicit TargetHeaderMIPS32(GlobalContext *Ctx);
 
 private:
   ~TargetHeaderMIPS32() = default;
 };
 
 } // end of namespace MIPS32
 } // end of namespace Ice
 
 #endif // SUBZERO_SRC_ICETARGETLOWERINGMIPS32_H