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Side by Side Diff: src/IceTargetLoweringMIPS32.cpp

Issue 2411193003: [SubZero] Legalize load, store for MIPS post lower (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Created 4 years, 2 months ago
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1 // 1 //
2 // The Subzero Code Generator 2 // The Subzero Code Generator
3 // 3 //
4 // This file is distributed under the University of Illinois Open Source 4 // This file is distributed under the University of Illinois Open Source
5 // License. See LICENSE.TXT for details. 5 // License. See LICENSE.TXT for details.
6 // 6 //
7 //===----------------------------------------------------------------------===// 7 //===----------------------------------------------------------------------===//
8 /// 8 ///
9 /// \file 9 /// \file
10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost 10 /// \brief Implements the TargetLoweringMIPS32 class, which consists almost
(...skipping 1511 matching lines...) Expand 10 before | Expand all | Expand 10 after
1522 Variable *Base, int32_t Offset, RegNumT ScratchRegNum) { 1522 Variable *Base, int32_t Offset, RegNumT ScratchRegNum) {
1523 // Legalize will likely need a lui/ori combination, but if the top bits are 1523 // Legalize will likely need a lui/ori combination, but if the top bits are
1524 // all 0 from negating the offset and subtracting, we could use that instead. 1524 // all 0 from negating the offset and subtracting, we could use that instead.
1525 const bool ShouldSub = Offset != 0 && (-Offset & 0xFFFF0000) == 0; 1525 const bool ShouldSub = Offset != 0 && (-Offset & 0xFFFF0000) == 0;
1526 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum); 1526 Variable *ScratchReg = Target->makeReg(IceType_i32, ScratchRegNum);
1527 if (ShouldSub) { 1527 if (ShouldSub) {
1528 Variable *OffsetVal = Target->legalizeToReg( 1528 Variable *OffsetVal = Target->legalizeToReg(
1529 Target->Ctx->getConstantInt32(-Offset), ScratchRegNum); 1529 Target->Ctx->getConstantInt32(-Offset), ScratchRegNum);
1530 Target->_sub(ScratchReg, Base, OffsetVal); 1530 Target->_sub(ScratchReg, Base, OffsetVal);
1531 } else { 1531 } else {
1532 Target->_addiu(ScratchReg, Base, Offset); 1532 constexpr bool SignExt = true;
1533 if (!OperandMIPS32Mem::canHoldOffset(Base->getType(), SignExt, Offset)) {
1534 uint32_t UpperBits = (Offset >> 16) & 0xFFFF;
Jim Stichnoth 2016/10/12 13:52:52 const uint32_t for these?
jaydeep.patil 2016/10/13 04:36:35 Done.
1535 uint32_t LowerBits = Offset & 0xFFFF;
1536 Target->_lui(ScratchReg, Target->Ctx->getConstantInt32(UpperBits));
1537 if (LowerBits)
1538 Target->_ori(ScratchReg, ScratchReg, LowerBits);
1539 Target->_addu(ScratchReg, ScratchReg, Base);
1540 } else {
1541 Target->_addiu(ScratchReg, Base, Offset);
1542 }
1533 } 1543 }
1534 1544
1535 return ScratchReg; 1545 return ScratchReg;
1536 } 1546 }
1537 1547
1538 void TargetMIPS32::PostLoweringLegalizer::legalizeMov(InstMIPS32Mov *MovInstr) { 1548 void TargetMIPS32::PostLoweringLegalizer::legalizeMov(InstMIPS32Mov *MovInstr) {
1539 Variable *Dest = MovInstr->getDest(); 1549 Variable *Dest = MovInstr->getDest();
1540 assert(Dest != nullptr); 1550 assert(Dest != nullptr);
1541 const Type DestTy = Dest->getType(); 1551 const Type DestTy = Dest->getType();
1542 assert(DestTy != IceType_i64); 1552 assert(DestTy != IceType_i64);
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1724 } 1734 }
1725 1735
1726 if (Legalized) { 1736 if (Legalized) {
1727 if (MovInstr->isDestRedefined()) { 1737 if (MovInstr->isDestRedefined()) {
1728 Target->_set_dest_redefined(); 1738 Target->_set_dest_redefined();
1729 } 1739 }
1730 MovInstr->setDeleted(); 1740 MovInstr->setDeleted();
1731 } 1741 }
1732 } 1742 }
1733 1743
1744 OperandMIPS32Mem *
1745 TargetMIPS32::PostLoweringLegalizer::legalizeMemOperand(OperandMIPS32Mem *Mem) {
Jim Stichnoth 2016/10/12 13:52:52 It would be nice (though I won't insist) if this C
jaydeep.patil 2016/10/13 04:36:35 Done.
1746 if (llvm::isa<ConstantRelocatable>(Mem->getOffset())) {
1747 return nullptr;
1748 }
1749 Variable *Base = Mem->getBase();
1750 ConstantInteger32 *Ci32 = llvm::cast<ConstantInteger32>(Mem->getOffset());
Jim Stichnoth 2016/10/12 13:52:52 auto *Ci32
jaydeep.patil 2016/10/13 04:36:35 Done.
1751 int32_t Offset = Ci32->getValue();
1752
1753 if (Base->isRematerializable()) {
1754 const int32_t ExtraOffset =
1755 (Base->getRegNum() == Target->getFrameOrStackReg())
1756 ? Target->getFrameFixedAllocaOffset()
1757 : 0;
1758 Offset += Base->getStackOffset() + ExtraOffset;
1759 Base = Target->getPhysicalRegister(Base->getRegNum());
1760 }
1761
1762 constexpr bool SignExt = true;
1763 if (!OperandMIPS32Mem::canHoldOffset(Mem->getType(), SignExt, Offset)) {
1764 Base = newBaseRegister(Base, Offset, Target->getReservedTmpReg());
1765 Offset = 0;
1766 }
1767
1768 return OperandMIPS32Mem::create(
1769 Target->Func, Mem->getType(), Base,
1770 llvm::cast<ConstantInteger32>(Target->Ctx->getConstantInt32(Offset)));
1771 }
1772
1734 void TargetMIPS32::postLowerLegalization() { 1773 void TargetMIPS32::postLowerLegalization() {
1735 Func->dump("Before postLowerLegalization"); 1774 Func->dump("Before postLowerLegalization");
1736 assert(hasComputedFrame()); 1775 assert(hasComputedFrame());
1737 for (CfgNode *Node : Func->getNodes()) { 1776 for (CfgNode *Node : Func->getNodes()) {
1738 Context.init(Node); 1777 Context.init(Node);
1739 PostLoweringLegalizer Legalizer(this); 1778 PostLoweringLegalizer Legalizer(this);
1740 while (!Context.atEnd()) { 1779 while (!Context.atEnd()) {
1741 PostIncrLoweringContext PostIncrement(Context); 1780 PostIncrLoweringContext PostIncrement(Context);
1742 Inst *CurInstr = iteratorToInst(Context.getCur()); 1781 Inst *CurInstr = iteratorToInst(Context.getCur());
1743
1744 // TODO(sagar.thakur): Add remaining cases of legalization.
1745
1746 if (auto *MovInstr = llvm::dyn_cast<InstMIPS32Mov>(CurInstr)) { 1782 if (auto *MovInstr = llvm::dyn_cast<InstMIPS32Mov>(CurInstr)) {
Jim Stichnoth 2016/10/12 13:52:52 This loop body has become kind of hard to read. I
jaydeep.patil 2016/10/13 04:36:35 Done.
1747 Legalizer.legalizeMov(MovInstr); 1783 Legalizer.legalizeMov(MovInstr);
1784 } else if (auto *SwInstr = llvm::dyn_cast<InstMIPS32Sw>(CurInstr)) {
1785 if (OperandMIPS32Mem *LegalMem = Legalizer.legalizeMemOperand(
1786 llvm::cast<OperandMIPS32Mem>(SwInstr->getSrc(1)))) {
1787 auto *Src = llvm::cast<Variable>(SwInstr->getSrc(0));
1788 _sw(Src, LegalMem);
1789 CurInstr->setDeleted();
1790 }
1791 } else if (auto *Swc1Instr = llvm::dyn_cast<InstMIPS32Swc1>(CurInstr)) {
1792 if (OperandMIPS32Mem *LegalMem = Legalizer.legalizeMemOperand(
1793 llvm::cast<OperandMIPS32Mem>(Swc1Instr->getSrc(1)))) {
1794 auto *Src = llvm::cast<Variable>(Swc1Instr->getSrc(0));
1795 _swc1(Src, LegalMem);
1796 CurInstr->setDeleted();
1797 }
1798 } else if (auto *Sdc1Instr = llvm::dyn_cast<InstMIPS32Sdc1>(CurInstr)) {
1799 if (OperandMIPS32Mem *LegalMem = Legalizer.legalizeMemOperand(
1800 llvm::cast<OperandMIPS32Mem>(Sdc1Instr->getSrc(1)))) {
1801 auto *Src = llvm::cast<Variable>(Sdc1Instr->getSrc(0));
1802 _sdc1(Src, LegalMem);
1803 CurInstr->setDeleted();
1804 }
1805 } else if (auto *LwInstr = llvm::dyn_cast<InstMIPS32Lw>(CurInstr)) {
1806 if (OperandMIPS32Mem *LegalMem = Legalizer.legalizeMemOperand(
1807 llvm::cast<OperandMIPS32Mem>(LwInstr->getSrc(0)))) {
1808 auto *Dst = llvm::cast<Variable>(LwInstr->getDest());
1809 _lw(Dst, LegalMem);
1810 CurInstr->setDeleted();
1811 }
1812 } else if (auto *Lwc1Instr = llvm::dyn_cast<InstMIPS32Lwc1>(CurInstr)) {
1813 if (OperandMIPS32Mem *LegalMem = Legalizer.legalizeMemOperand(
1814 llvm::cast<OperandMIPS32Mem>(Lwc1Instr->getSrc(0)))) {
1815 auto *Dst = llvm::cast<Variable>(Lwc1Instr->getDest());
1816 _lwc1(Dst, LegalMem);
1817 CurInstr->setDeleted();
1818 }
1819 } else if (auto *Ldc1Instr = llvm::dyn_cast<InstMIPS32Ldc1>(CurInstr)) {
1820 if (OperandMIPS32Mem *LegalMem = Legalizer.legalizeMemOperand(
1821 llvm::cast<OperandMIPS32Mem>(Ldc1Instr->getSrc(0)))) {
1822 auto *Dst = llvm::cast<Variable>(Ldc1Instr->getDest());
1823 _ldc1(Dst, LegalMem);
1824 CurInstr->setDeleted();
1825 }
1748 } 1826 }
1749 } 1827 }
1750 } 1828 }
1751 } 1829 }
1752 1830
1753 Operand *TargetMIPS32::loOperand(Operand *Operand) { 1831 Operand *TargetMIPS32::loOperand(Operand *Operand) {
1754 assert(Operand->getType() == IceType_i64); 1832 assert(Operand->getType() == IceType_i64);
1755 if (auto *Var64On32 = llvm::dyn_cast<Variable64On32>(Operand)) 1833 if (auto *Var64On32 = llvm::dyn_cast<Variable64On32>(Operand))
1756 return Var64On32->getLo(); 1834 return Var64On32->getLo();
1757 if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) { 1835 if (auto *Const = llvm::dyn_cast<ConstantInteger64>(Operand)) {
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5000 Str << "\t.set\t" 5078 Str << "\t.set\t"
5001 << "nomips16\n"; 5079 << "nomips16\n";
5002 } 5080 }
5003 5081
5004 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM]; 5082 SmallBitVector TargetMIPS32::TypeToRegisterSet[RCMIPS32_NUM];
5005 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM]; 5083 SmallBitVector TargetMIPS32::TypeToRegisterSetUnfiltered[RCMIPS32_NUM];
5006 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM]; 5084 SmallBitVector TargetMIPS32::RegisterAliases[RegMIPS32::Reg_NUM];
5007 5085
5008 } // end of namespace MIPS32 5086 } // end of namespace MIPS32
5009 } // end of namespace Ice 5087 } // end of namespace Ice
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