[Turbofan] Add concept of FP register aliasing on ARM 32.

test/unittests/compiler/move-optimizer-unittest.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/move-optimizer.h"
 #include "src/compiler/pipeline.h"
 #include "test/unittests/compiler/instruction-sequence-unittest.h"
 
 namespace v8 {
 namespace internal {
 namespace compiler {
 
 class MoveOptimizerTest : public InstructionSequenceTest {
  public:
+  // FP register indices which don't interfere under simple or complex aliasing.
+  static const int kF64_1 = 0;
+  static const int kF64_2 = 1;
+  static const int kF32_1 = 4;
+  static const int kF32_2 = 5;
+  static const int kS128_1 = 2;
+  static const int kS128_2 = 3;
+
   Instruction* LastInstruction() { return sequence()->instructions().back(); }
 
   void AddMove(Instruction* instr, TestOperand from, TestOperand to,
                Instruction::GapPosition pos = Instruction::START) {
     auto parallel_move = instr->GetOrCreateParallelMove(pos, zone());
     parallel_move->AddMove(ConvertMoveArg(from), ConvertMoveArg(to));
   }
 
   int NonRedundantSize(ParallelMove* moves) {
     int i = 0;
@@ skipping 67 matching lines @@
 
 
 TEST_F(MoveOptimizerTest, RemovesRedundant) {
   StartBlock();
   auto first_instr = EmitNop();
   auto last_instr = EmitNop();
 
   AddMove(first_instr, Reg(0), Reg(1));
   AddMove(last_instr, Reg(1), Reg(0));
 
-  AddMove(first_instr, FPReg(0), FPReg(1));
-  AddMove(last_instr, FPReg(1), FPReg(0));
+  AddMove(first_instr, FPReg(kS128_1, kSimd128), FPReg(kS128_2, kSimd128));
+  AddMove(last_instr, FPReg(kS128_2, kSimd128), FPReg(kS128_1, kSimd128));
+  AddMove(first_instr, FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64));
+  AddMove(last_instr, FPReg(kF64_2, kFloat64), FPReg(kF64_1, kFloat64));
+  AddMove(first_instr, FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32));
+  AddMove(last_instr, FPReg(kF32_2, kFloat32), FPReg(kF32_1, kFloat32));
 
   EndBlock(Last());
 
   Optimize();
 
   CHECK_EQ(0, NonRedundantSize(first_instr->parallel_moves()[0]));
   auto move = last_instr->parallel_moves()[0];
-  CHECK_EQ(2, NonRedundantSize(move));
+  CHECK_EQ(4, NonRedundantSize(move));
   CHECK(Contains(move, Reg(0), Reg(1)));
-  CHECK(Contains(move, FPReg(0), FPReg(1)));
+  CHECK(Contains(move, FPReg(kS128_1, kSimd128), FPReg(kS128_2, kSimd128)));
+  CHECK(Contains(move, FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64)));
+  CHECK(Contains(move, FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32)));
 }
 
 
 TEST_F(MoveOptimizerTest, RemovesRedundantExplicit) {
-  int first_reg_index = GetAllocatableCode(0);
-  int second_reg_index = GetAllocatableCode(1);
+  int index1 = GetAllocatableCode(0);
+  int index2 = GetAllocatableCode(1);
+  int s128_1 = GetAllocatableCode(kS128_1, kSimd128);
+  int s128_2 = GetAllocatableCode(kS128_2, kSimd128);
+  int f64_1 = GetAllocatableCode(kF64_1, kFloat64);
+  int f64_2 = GetAllocatableCode(kF64_2, kFloat64);
+  int f32_1 = GetAllocatableCode(kF32_1, kFloat32);
+  int f32_2 = GetAllocatableCode(kF32_2, kFloat32);
 
   StartBlock();
   auto first_instr = EmitNop();
   auto last_instr = EmitNop();
 
-  AddMove(first_instr, Reg(first_reg_index), ExplicitReg(second_reg_index));
-  AddMove(last_instr, Reg(second_reg_index), Reg(first_reg_index));
+  AddMove(first_instr, Reg(index1), ExplicitReg(index2));
+  AddMove(last_instr, Reg(index2), Reg(index1));
+
+  AddMove(first_instr, FPReg(s128_1, kSimd128),
+          ExplicitFPReg(s128_2, kSimd128));
+  AddMove(last_instr, FPReg(s128_2, kSimd128), FPReg(s128_1, kSimd128));
+  AddMove(first_instr, FPReg(f64_1, kFloat64), ExplicitFPReg(f64_2, kFloat64));
+  AddMove(last_instr, FPReg(f64_2, kFloat64), FPReg(f64_1, kFloat64));
+  AddMove(first_instr, FPReg(f32_1, kFloat32), ExplicitFPReg(f32_2, kFloat32));
+  AddMove(last_instr, FPReg(f32_2, kFloat32), FPReg(f32_1, kFloat32));
 
   EndBlock(Last());
 
   Optimize();
 
   CHECK_EQ(0, NonRedundantSize(first_instr->parallel_moves()[0]));
   auto move = last_instr->parallel_moves()[0];
-  CHECK_EQ(1, NonRedundantSize(move));
-  CHECK(Contains(move, Reg(first_reg_index), ExplicitReg(second_reg_index)));
+  CHECK_EQ(4, NonRedundantSize(move));
+  CHECK(Contains(move, Reg(index1), ExplicitReg(index2)));
+  CHECK(
+      Contains(move, FPReg(s128_1, kSimd128), ExplicitFPReg(s128_2, kSimd128)));
+  CHECK(Contains(move, FPReg(f64_1, kFloat64), ExplicitFPReg(f64_2, kFloat64)));
+  CHECK(Contains(move, FPReg(f32_1, kFloat32), ExplicitFPReg(f32_2, kFloat32)));
 }
 
 
 TEST_F(MoveOptimizerTest, SplitsConstants) {
   StartBlock();
   EndBlock(Last());
 
   auto gap = LastInstruction();
   AddMove(gap, Const(1), Slot(0));
   AddMove(gap, Const(1), Slot(1));
@@ skipping 14 matching lines @@
 }
 
 
 TEST_F(MoveOptimizerTest, SimpleMerge) {
   StartBlock();
   EndBlock(Branch(Imm(), 1, 2));
 
   StartBlock();
   EndBlock(Jump(2));
   AddMove(LastInstruction(), Reg(0), Reg(1));
+  AddMove(LastInstruction(), FPReg(kS128_1, kSimd128),
+          FPReg(kS128_2, kSimd128));
+  AddMove(LastInstruction(), FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64));
+  AddMove(LastInstruction(), FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32));
 
   StartBlock();
   EndBlock(Jump(1));
   AddMove(LastInstruction(), Reg(0), Reg(1));
+  AddMove(LastInstruction(), FPReg(kS128_1, kSimd128),
+          FPReg(kS128_2, kSimd128));
+  AddMove(LastInstruction(), FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64));
+  AddMove(LastInstruction(), FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32));
 
   StartBlock();
   EndBlock(Last());
 
   auto last = LastInstruction();
 
   Optimize();
 
   auto move = last->parallel_moves()[0];
-  CHECK_EQ(1, NonRedundantSize(move));
+  CHECK_EQ(4, NonRedundantSize(move));
   CHECK(Contains(move, Reg(0), Reg(1)));
+  CHECK(Contains(move, FPReg(kS128_1, kSimd128), FPReg(kS128_2, kSimd128)));
+  CHECK(Contains(move, FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64)));
+  CHECK(Contains(move, FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32)));
 }
 
 
 TEST_F(MoveOptimizerTest, SimpleMergeCycle) {
   StartBlock();
   EndBlock(Branch(Imm(), 1, 2));
 
   StartBlock();
   EndBlock(Jump(2));
   auto gap_0 = LastInstruction();
   AddMove(gap_0, Reg(0), Reg(1));
   AddMove(LastInstruction(), Reg(1), Reg(0));
 
-  AddMove(gap_0, FPReg(0), FPReg(1));
-  AddMove(LastInstruction(), FPReg(1), FPReg(0));
+  AddMove(gap_0, FPReg(kS128_1, kSimd128), FPReg(kS128_2, kSimd128));
+  AddMove(LastInstruction(), FPReg(kS128_2, kSimd128),
+          FPReg(kS128_1, kSimd128));
+  AddMove(gap_0, FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64));
+  AddMove(LastInstruction(), FPReg(kF64_2, kFloat64), FPReg(kF64_1, kFloat64));
+  AddMove(gap_0, FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32));
+  AddMove(LastInstruction(), FPReg(kF32_2, kFloat32), FPReg(kF32_1, kFloat32));
 
   StartBlock();
   EndBlock(Jump(1));
   auto gap_1 = LastInstruction();
   AddMove(gap_1, Reg(0), Reg(1));
   AddMove(gap_1, Reg(1), Reg(0));
-  AddMove(gap_1, FPReg(0), FPReg(1));
-  AddMove(gap_1, FPReg(1), FPReg(0));
+  AddMove(gap_1, FPReg(kS128_1, kSimd128), FPReg(kS128_2, kSimd128));
+  AddMove(gap_1, FPReg(kS128_2, kSimd128), FPReg(kS128_1, kSimd128));
+  AddMove(gap_1, FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64));
+  AddMove(gap_1, FPReg(kF64_2, kFloat64), FPReg(kF64_1, kFloat64));
+  AddMove(gap_1, FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32));
+  AddMove(gap_1, FPReg(kF32_2, kFloat32), FPReg(kF32_1, kFloat32));
 
   StartBlock();
   EndBlock(Last());
 
   auto last = LastInstruction();
 
   Optimize();
 
   CHECK(gap_0->AreMovesRedundant());
   CHECK(gap_1->AreMovesRedundant());
   auto move = last->parallel_moves()[0];
-  CHECK_EQ(4, NonRedundantSize(move));
+  CHECK_EQ(8, NonRedundantSize(move));
   CHECK(Contains(move, Reg(0), Reg(1)));
   CHECK(Contains(move, Reg(1), Reg(0)));
-  CHECK(Contains(move, FPReg(0), FPReg(1)));
-  CHECK(Contains(move, FPReg(1), FPReg(0)));
+  CHECK(Contains(move, FPReg(kS128_1, kSimd128), FPReg(kS128_2, kSimd128)));
+  CHECK(Contains(move, FPReg(kS128_2, kSimd128), FPReg(kS128_1, kSimd128)));
+  CHECK(Contains(move, FPReg(kF64_1, kFloat64), FPReg(kF64_2, kFloat64)));
+  CHECK(Contains(move, FPReg(kF64_2, kFloat64), FPReg(kF64_1, kFloat64)));
+  CHECK(Contains(move, FPReg(kF32_1, kFloat32), FPReg(kF32_2, kFloat32)));
+  CHECK(Contains(move, FPReg(kF32_2, kFloat32), FPReg(kF32_1, kFloat32)));
 }
 
 
 TEST_F(MoveOptimizerTest, GapsCanMoveOverInstruction) {
   StartBlock();
   int const_index = 1;
   DefineConstant(const_index);
   Instruction* ctant_def = LastInstruction();
   AddMove(ctant_def, Reg(1), Reg(0));
 
@@ skipping 101 matching lines @@
   ParallelMove* b2_move = last_move_b2->parallel_moves()[0];
   CHECK_EQ(1, NonRedundantSize(b2_move));
   CHECK(Contains(b1_move, Reg(0), Reg(1)));
 }
 
 TEST_F(MoveOptimizerTest, ClobberedDestinationsAreEliminated) {
   StartBlock();
   EmitNop();
   Instruction* first_instr = LastInstruction();
   AddMove(first_instr, Reg(0), Reg(1));
-  AddMove(first_instr, FPReg(0), FPReg(1));
-  EmitOOI(Reg(1), FPReg(1), 0, nullptr);
+  EmitOI(Reg(1), 0, nullptr);
   Instruction* last_instr = LastInstruction();
   EndBlock();
   Optimize();
+
+  ParallelMove* first_move = first_instr->parallel_moves()[0];
+  CHECK_EQ(0, NonRedundantSize(first_move));
+
+  ParallelMove* last_move = last_instr->parallel_moves()[0];
+  CHECK_EQ(0, NonRedundantSize(last_move));
+}
+
+TEST_F(MoveOptimizerTest, ClobberedFPDestinationsAreEliminated) {
+  StartBlock();
+  EmitNop();
+  Instruction* first_instr = LastInstruction();
+  AddMove(first_instr, FPReg(4, kFloat64), FPReg(1, kFloat64));
+  if (!kSimpleFPAliasing) {
+    // We clobber q0 below. This is aliased by d0, d1, s0, s1, s2, and s3.
+    // Add moves to registers s2 and s3.
+    AddMove(first_instr, FPReg(10, kFloat32), FPReg(0, kFloat32));
+    AddMove(first_instr, FPReg(11, kFloat32), FPReg(1, kFloat32));
+  }
+  // Clobbers output register 0.
+  EmitOI(FPReg(0, kSimd128), 0, nullptr);
+  Instruction* last_instr = LastInstruction();
+  EndBlock();
+  Optimize();
 
   ParallelMove* first_move = first_instr->parallel_moves()[0];
   CHECK_EQ(0, NonRedundantSize(first_move));
 
   ParallelMove* last_move = last_instr->parallel_moves()[0];
   CHECK_EQ(0, NonRedundantSize(last_move));
 }
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8