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Issue 2410673002: [Turbofan] Add concept of FP register aliasing on ARM 32. (Closed)
Patch Set: Add a TODO. Created 4 years, 1 month ago
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1 // Copyright 2015 the V8 project authors. All rights reserved. 1 // Copyright 2015 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/assembler.h" 5 #include "src/assembler.h"
6 #include "src/codegen.h" 6 #include "src/codegen.h"
7 #include "src/compiler/linkage.h" 7 #include "src/compiler/linkage.h"
8 #include "src/compiler/raw-machine-assembler.h" 8 #include "src/compiler/raw-machine-assembler.h"
9 #include "src/machine-type.h" 9 #include "src/machine-type.h"
10 #include "src/register-configuration.h" 10 #include "src/register-configuration.h"
(...skipping 69 matching lines...) Expand 10 before | Expand all | Expand 10 after
80 RegisterPairs() 80 RegisterPairs()
81 : Pairs(100, GetRegConfig()->num_allocatable_general_registers(), 81 : Pairs(100, GetRegConfig()->num_allocatable_general_registers(),
82 GetRegConfig()->allocatable_general_codes()) {} 82 GetRegConfig()->allocatable_general_codes()) {}
83 }; 83 };
84 84
85 85
86 // Pairs of double registers. 86 // Pairs of double registers.
87 class Float32RegisterPairs : public Pairs { 87 class Float32RegisterPairs : public Pairs {
88 public: 88 public:
89 Float32RegisterPairs() 89 Float32RegisterPairs()
90 : Pairs(100, GetRegConfig()->num_allocatable_aliased_double_registers(), 90 : Pairs(
91 GetRegConfig()->allocatable_double_codes()) {} 91 100,
92 #if V8_TARGET_ARCH_ARM
93 // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
94 GetRegConfig()->num_allocatable_double_registers() / 2 - 2,
95 #else
96 GetRegConfig()->num_allocatable_double_registers(),
97 #endif
98 GetRegConfig()->allocatable_double_codes()) {
99 }
92 }; 100 };
93 101
94 102
95 // Pairs of double registers. 103 // Pairs of double registers.
96 class Float64RegisterPairs : public Pairs { 104 class Float64RegisterPairs : public Pairs {
97 public: 105 public:
98 Float64RegisterPairs() 106 Float64RegisterPairs()
99 : Pairs(100, GetRegConfig()->num_allocatable_double_registers(), 107 : Pairs(100, GetRegConfig()->num_allocatable_double_registers(),
100 GetRegConfig()->allocatable_double_codes()) {} 108 GetRegConfig()->allocatable_double_codes()) {}
101 }; 109 };
(...skipping 18 matching lines...) Expand all
120 int fp_offset; 128 int fp_offset;
121 int* fp_regs; 129 int* fp_regs;
122 130
123 int stack_offset; 131 int stack_offset;
124 132
125 LinkageLocation Next(MachineType type) { 133 LinkageLocation Next(MachineType type) {
126 if (IsFloatingPoint(type.representation())) { 134 if (IsFloatingPoint(type.representation())) {
127 // Allocate a floating point register/stack location. 135 // Allocate a floating point register/stack location.
128 if (fp_offset < fp_count) { 136 if (fp_offset < fp_count) {
129 int code = fp_regs[fp_offset++]; 137 int code = fp_regs[fp_offset++];
138 #if V8_TARGET_ARCH_ARM
139 // TODO(bbudge) Modify wasm linkage to allow use of all float regs.
140 if (type.representation() == MachineRepresentation::kFloat32) code *= 2;
141 #endif
130 return LinkageLocation::ForRegister(code, type); 142 return LinkageLocation::ForRegister(code, type);
131 } else { 143 } else {
132 int offset = -1 - stack_offset; 144 int offset = -1 - stack_offset;
133 stack_offset += StackWords(type); 145 stack_offset += StackWords(type);
134 return LinkageLocation::ForCallerFrameSlot(offset, type); 146 return LinkageLocation::ForCallerFrameSlot(offset, type);
135 } 147 }
136 } else { 148 } else {
137 // Allocate a general purpose register/stack location. 149 // Allocate a general purpose register/stack location.
138 if (gp_offset < gp_count) { 150 if (gp_offset < gp_count) {
139 return LinkageLocation::ForRegister(gp_regs[gp_offset++], type); 151 return LinkageLocation::ForRegister(gp_regs[gp_offset++], type);
(...skipping 1052 matching lines...) Expand 10 before | Expand all | Expand 10 after
1192 TestStackSlot(MachineType::Float32(), magic); 1204 TestStackSlot(MachineType::Float32(), magic);
1193 } 1205 }
1194 1206
1195 TEST(RunStackSlotFloat64) { 1207 TEST(RunStackSlotFloat64) {
1196 double magic = 3456.375; 1208 double magic = 3456.375;
1197 TestStackSlot(MachineType::Float64(), magic); 1209 TestStackSlot(MachineType::Float64(), magic);
1198 } 1210 }
1199 } // namespace compiler 1211 } // namespace compiler
1200 } // namespace internal 1212 } // namespace internal
1201 } // namespace v8 1213 } // namespace v8
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