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Side by Side Diff: src/compiler/register-allocator.h

Issue 2410673002: [Turbofan] Add concept of FP register aliasing on ARM 32. (Closed)
Patch Set: Move helper fn / macro into OperandSet class. Created 4 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_REGISTER_ALLOCATOR_H_ 5 #ifndef V8_REGISTER_ALLOCATOR_H_
6 #define V8_REGISTER_ALLOCATOR_H_ 6 #define V8_REGISTER_ALLOCATOR_H_
7 7
8 #include "src/compiler/instruction.h" 8 #include "src/compiler/instruction.h"
9 #include "src/ostreams.h" 9 #include "src/ostreams.h"
10 #include "src/register-configuration.h" 10 #include "src/register-configuration.h"
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347 UsePosition* NextRegisterPosition(LifetimePosition start) const; 347 UsePosition* NextRegisterPosition(LifetimePosition start) const;
348 348
349 // Returns the first use position requiring stack slot, or nullptr. 349 // Returns the first use position requiring stack slot, or nullptr.
350 UsePosition* NextSlotPosition(LifetimePosition start) const; 350 UsePosition* NextSlotPosition(LifetimePosition start) const;
351 351
352 // Returns use position for which register is beneficial in this live 352 // Returns use position for which register is beneficial in this live
353 // range and which follows both start and last processed use position 353 // range and which follows both start and last processed use position
354 UsePosition* NextUsePositionRegisterIsBeneficial( 354 UsePosition* NextUsePositionRegisterIsBeneficial(
355 LifetimePosition start) const; 355 LifetimePosition start) const;
356 356
357 // Returns lifetime position for which register is beneficial in this live
358 // range and which follows both start and last processed use position.
359 LifetimePosition NextLifetimePositionRegisterIsBeneficial(
360 const LifetimePosition& start) const;
361
357 // Returns use position for which register is beneficial in this live 362 // Returns use position for which register is beneficial in this live
358 // range and which precedes start. 363 // range and which precedes start.
359 UsePosition* PreviousUsePositionRegisterIsBeneficial( 364 UsePosition* PreviousUsePositionRegisterIsBeneficial(
360 LifetimePosition start) const; 365 LifetimePosition start) const;
361 366
362 // Can this live range be spilled at this position. 367 // Can this live range be spilled at this position.
363 bool CanBeSpilled(LifetimePosition pos) const; 368 bool CanBeSpilled(LifetimePosition pos) const;
364 369
365 // Splitting primitive used by both splitting and splintering members. 370 // Splitting primitive used by both splitting and splintering members.
366 // Performs the split, but does not link the resulting ranges. 371 // Performs the split, but does not link the resulting ranges.
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764 const ZoneVector<TopLevelLiveRange*>& live_ranges() const { 769 const ZoneVector<TopLevelLiveRange*>& live_ranges() const {
765 return live_ranges_; 770 return live_ranges_;
766 } 771 }
767 ZoneVector<TopLevelLiveRange*>& live_ranges() { return live_ranges_; } 772 ZoneVector<TopLevelLiveRange*>& live_ranges() { return live_ranges_; }
768 const ZoneVector<TopLevelLiveRange*>& fixed_live_ranges() const { 773 const ZoneVector<TopLevelLiveRange*>& fixed_live_ranges() const {
769 return fixed_live_ranges_; 774 return fixed_live_ranges_;
770 } 775 }
771 ZoneVector<TopLevelLiveRange*>& fixed_live_ranges() { 776 ZoneVector<TopLevelLiveRange*>& fixed_live_ranges() {
772 return fixed_live_ranges_; 777 return fixed_live_ranges_;
773 } 778 }
779 ZoneVector<TopLevelLiveRange*>& fixed_float_live_ranges() {
780 return fixed_float_live_ranges_;
781 }
782 const ZoneVector<TopLevelLiveRange*>& fixed_float_live_ranges() const {
783 return fixed_float_live_ranges_;
784 }
774 ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() { 785 ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() {
775 return fixed_double_live_ranges_; 786 return fixed_double_live_ranges_;
776 } 787 }
777 const ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() const { 788 const ZoneVector<TopLevelLiveRange*>& fixed_double_live_ranges() const {
778 return fixed_double_live_ranges_; 789 return fixed_double_live_ranges_;
779 } 790 }
791 ZoneVector<TopLevelLiveRange*>& fixed_simd128_live_ranges() {
792 return fixed_simd128_live_ranges_;
793 }
794 const ZoneVector<TopLevelLiveRange*>& fixed_simd128_live_ranges() const {
795 return fixed_simd128_live_ranges_;
796 }
780 ZoneVector<BitVector*>& live_in_sets() { return live_in_sets_; } 797 ZoneVector<BitVector*>& live_in_sets() { return live_in_sets_; }
781 ZoneVector<BitVector*>& live_out_sets() { return live_out_sets_; } 798 ZoneVector<BitVector*>& live_out_sets() { return live_out_sets_; }
782 ZoneVector<SpillRange*>& spill_ranges() { return spill_ranges_; } 799 ZoneVector<SpillRange*>& spill_ranges() { return spill_ranges_; }
783 DelayedReferences& delayed_references() { return delayed_references_; } 800 DelayedReferences& delayed_references() { return delayed_references_; }
784 InstructionSequence* code() const { return code_; } 801 InstructionSequence* code() const { return code_; }
785 // This zone is for data structures only needed during register allocation 802 // This zone is for data structures only needed during register allocation
786 // phases. 803 // phases.
787 Zone* allocation_zone() const { return allocation_zone_; } 804 Zone* allocation_zone() const { return allocation_zone_; }
788 // This zone is for InstructionOperands and moves that live beyond register 805 // This zone is for InstructionOperands and moves that live beyond register
789 // allocation. 806 // allocation.
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831 Zone* const allocation_zone_; 848 Zone* const allocation_zone_;
832 Frame* const frame_; 849 Frame* const frame_;
833 InstructionSequence* const code_; 850 InstructionSequence* const code_;
834 const char* const debug_name_; 851 const char* const debug_name_;
835 const RegisterConfiguration* const config_; 852 const RegisterConfiguration* const config_;
836 PhiMap phi_map_; 853 PhiMap phi_map_;
837 ZoneVector<BitVector*> live_in_sets_; 854 ZoneVector<BitVector*> live_in_sets_;
838 ZoneVector<BitVector*> live_out_sets_; 855 ZoneVector<BitVector*> live_out_sets_;
839 ZoneVector<TopLevelLiveRange*> live_ranges_; 856 ZoneVector<TopLevelLiveRange*> live_ranges_;
840 ZoneVector<TopLevelLiveRange*> fixed_live_ranges_; 857 ZoneVector<TopLevelLiveRange*> fixed_live_ranges_;
858 ZoneVector<TopLevelLiveRange*> fixed_float_live_ranges_;
841 ZoneVector<TopLevelLiveRange*> fixed_double_live_ranges_; 859 ZoneVector<TopLevelLiveRange*> fixed_double_live_ranges_;
860 ZoneVector<TopLevelLiveRange*> fixed_simd128_live_ranges_;
842 ZoneVector<SpillRange*> spill_ranges_; 861 ZoneVector<SpillRange*> spill_ranges_;
843 DelayedReferences delayed_references_; 862 DelayedReferences delayed_references_;
844 BitVector* assigned_registers_; 863 BitVector* assigned_registers_;
845 BitVector* assigned_double_registers_; 864 BitVector* assigned_double_registers_;
846 int virtual_register_count_; 865 int virtual_register_count_;
847 RangesWithPreassignedSlots preassigned_slot_ranges_; 866 RangesWithPreassignedSlots preassigned_slot_ranges_;
848 867
849 DISALLOW_COPY_AND_ASSIGN(RegisterAllocationData); 868 DISALLOW_COPY_AND_ASSIGN(RegisterAllocationData);
850 }; 869 };
851 870
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1049 void ActiveToInactive(LiveRange* range); 1068 void ActiveToInactive(LiveRange* range);
1050 void InactiveToHandled(LiveRange* range); 1069 void InactiveToHandled(LiveRange* range);
1051 void InactiveToActive(LiveRange* range); 1070 void InactiveToActive(LiveRange* range);
1052 1071
1053 // Helper methods for allocating registers. 1072 // Helper methods for allocating registers.
1054 bool TryReuseSpillForPhi(TopLevelLiveRange* range); 1073 bool TryReuseSpillForPhi(TopLevelLiveRange* range);
1055 bool TryAllocateFreeReg(LiveRange* range, 1074 bool TryAllocateFreeReg(LiveRange* range,
1056 const Vector<LifetimePosition>& free_until_pos); 1075 const Vector<LifetimePosition>& free_until_pos);
1057 bool TryAllocatePreferredReg(LiveRange* range, 1076 bool TryAllocatePreferredReg(LiveRange* range,
1058 const Vector<LifetimePosition>& free_until_pos); 1077 const Vector<LifetimePosition>& free_until_pos);
1078 void GetFPRegisterSet(MachineRepresentation rep, int* num_regs,
1079 int* num_codes, const int** codes) const;
1059 void FindFreeRegistersForRange(LiveRange* range, 1080 void FindFreeRegistersForRange(LiveRange* range,
1060 Vector<LifetimePosition> free_until_pos); 1081 Vector<LifetimePosition> free_until_pos);
1061 void ProcessCurrentRange(LiveRange* current); 1082 void ProcessCurrentRange(LiveRange* current);
1062 void AllocateBlockedReg(LiveRange* range); 1083 void AllocateBlockedReg(LiveRange* range);
1063 bool TrySplitAndSpillSplinter(LiveRange* range); 1084 bool TrySplitAndSpillSplinter(LiveRange* range);
1064 1085
1065 // Spill the given life range after position pos. 1086 // Spill the given life range after position pos.
1066 void SpillAfter(LiveRange* range, LifetimePosition pos); 1087 void SpillAfter(LiveRange* range, LifetimePosition pos);
1067 1088
1068 // Spill the given life range after position [start] and up to position [end]. 1089 // Spill the given life range after position [start] and up to position [end].
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1180 RegisterAllocationData* const data_; 1201 RegisterAllocationData* const data_;
1181 1202
1182 DISALLOW_COPY_AND_ASSIGN(LiveRangeConnector); 1203 DISALLOW_COPY_AND_ASSIGN(LiveRangeConnector);
1183 }; 1204 };
1184 1205
1185 } // namespace compiler 1206 } // namespace compiler
1186 } // namespace internal 1207 } // namespace internal
1187 } // namespace v8 1208 } // namespace v8
1188 1209
1189 #endif // V8_REGISTER_ALLOCATOR_H_ 1210 #endif // V8_REGISTER_ALLOCATOR_H_
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