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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include <limits.h> // For LONG_MIN, LONG_MAX. | 5 #include <limits.h> // For LONG_MIN, LONG_MAX. |
6 | 6 |
7 #if V8_TARGET_ARCH_ARM | 7 #if V8_TARGET_ARCH_ARM |
8 | 8 |
9 #include "src/base/bits.h" | 9 #include "src/base/bits.h" |
10 #include "src/base/division-by-constant.h" | 10 #include "src/base/division-by-constant.h" |
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1044 | 1044 |
1045 void MacroAssembler::VmovLow(DwVfpRegister dst, Register src) { | 1045 void MacroAssembler::VmovLow(DwVfpRegister dst, Register src) { |
1046 if (dst.code() < 16) { | 1046 if (dst.code() < 16) { |
1047 const LowDwVfpRegister loc = LowDwVfpRegister::from_code(dst.code()); | 1047 const LowDwVfpRegister loc = LowDwVfpRegister::from_code(dst.code()); |
1048 vmov(loc.low(), src); | 1048 vmov(loc.low(), src); |
1049 } else { | 1049 } else { |
1050 vmov(dst, VmovIndexLo, src); | 1050 vmov(dst, VmovIndexLo, src); |
1051 } | 1051 } |
1052 } | 1052 } |
1053 | 1053 |
| 1054 void MacroAssembler::VmovExtended(Register dst, int src_code) { |
| 1055 DCHECK_LE(32, src_code); |
| 1056 DCHECK_GT(64, src_code); |
| 1057 if (src_code & 0x1) { |
| 1058 VmovHigh(dst, DwVfpRegister::from_code(src_code / 2)); |
| 1059 } else { |
| 1060 VmovLow(dst, DwVfpRegister::from_code(src_code / 2)); |
| 1061 } |
| 1062 } |
| 1063 |
| 1064 void MacroAssembler::VmovExtended(int dst_code, Register src) { |
| 1065 DCHECK_LE(32, dst_code); |
| 1066 DCHECK_GT(64, dst_code); |
| 1067 if (dst_code & 0x1) { |
| 1068 VmovHigh(DwVfpRegister::from_code(dst_code / 2), src); |
| 1069 } else { |
| 1070 VmovLow(DwVfpRegister::from_code(dst_code / 2), src); |
| 1071 } |
| 1072 } |
| 1073 |
| 1074 void MacroAssembler::VmovExtended(int dst_code, int src_code, |
| 1075 Register scratch) { |
| 1076 if (src_code < 32 && dst_code < 32) { |
| 1077 // src and dst are both s-registers. |
| 1078 vmov(SwVfpRegister::from_code(dst_code), |
| 1079 SwVfpRegister::from_code(src_code)); |
| 1080 } else if (src_code < 32) { |
| 1081 // src is an s-register. |
| 1082 vmov(scratch, SwVfpRegister::from_code(src_code)); |
| 1083 VmovExtended(dst_code, scratch); |
| 1084 } else if (dst_code < 32) { |
| 1085 // dst is an s-register. |
| 1086 VmovExtended(scratch, src_code); |
| 1087 vmov(SwVfpRegister::from_code(dst_code), scratch); |
| 1088 } else { |
| 1089 // Neither src or dst are s-registers. |
| 1090 DCHECK_GT(64, src_code); |
| 1091 DCHECK_GT(64, dst_code); |
| 1092 VmovExtended(scratch, src_code); |
| 1093 VmovExtended(dst_code, scratch); |
| 1094 } |
| 1095 } |
| 1096 |
| 1097 void MacroAssembler::VmovExtended(int dst_code, const MemOperand& src, |
| 1098 Register scratch) { |
| 1099 if (dst_code >= 32) { |
| 1100 ldr(scratch, src); |
| 1101 VmovExtended(dst_code, scratch); |
| 1102 } else { |
| 1103 vldr(SwVfpRegister::from_code(dst_code), src); |
| 1104 } |
| 1105 } |
| 1106 |
| 1107 void MacroAssembler::VmovExtended(const MemOperand& dst, int src_code, |
| 1108 Register scratch) { |
| 1109 if (src_code >= 32) { |
| 1110 VmovExtended(scratch, src_code); |
| 1111 str(scratch, dst); |
| 1112 } else { |
| 1113 vstr(SwVfpRegister::from_code(src_code), dst); |
| 1114 } |
| 1115 } |
| 1116 |
1054 void MacroAssembler::LslPair(Register dst_low, Register dst_high, | 1117 void MacroAssembler::LslPair(Register dst_low, Register dst_high, |
1055 Register src_low, Register src_high, | 1118 Register src_low, Register src_high, |
1056 Register scratch, Register shift) { | 1119 Register scratch, Register shift) { |
1057 DCHECK(!AreAliased(dst_high, src_low)); | 1120 DCHECK(!AreAliased(dst_high, src_low)); |
1058 DCHECK(!AreAliased(dst_high, shift)); | 1121 DCHECK(!AreAliased(dst_high, shift)); |
1059 | 1122 |
1060 Label less_than_32; | 1123 Label less_than_32; |
1061 Label done; | 1124 Label done; |
1062 rsb(scratch, shift, Operand(32), SetCC); | 1125 rsb(scratch, shift, Operand(32), SetCC); |
1063 b(gt, &less_than_32); | 1126 b(gt, &less_than_32); |
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4167 } | 4230 } |
4168 } | 4231 } |
4169 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); | 4232 if (mag.shift > 0) mov(result, Operand(result, ASR, mag.shift)); |
4170 add(result, result, Operand(dividend, LSR, 31)); | 4233 add(result, result, Operand(dividend, LSR, 31)); |
4171 } | 4234 } |
4172 | 4235 |
4173 } // namespace internal | 4236 } // namespace internal |
4174 } // namespace v8 | 4237 } // namespace v8 |
4175 | 4238 |
4176 #endif // V8_TARGET_ARCH_ARM | 4239 #endif // V8_TARGET_ARCH_ARM |
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