OLD | NEW |
1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. |
6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/constants_arm64.h" | 9 #include "vm/constants_arm64.h" |
10 #include "vm/cpu.h" | 10 #include "vm/cpu.h" |
(...skipping 324 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
335 | 335 |
336 SwitchableCallPattern::SwitchableCallPattern(uword pc, const Code& code) | 336 SwitchableCallPattern::SwitchableCallPattern(uword pc, const Code& code) |
337 : object_pool_(ObjectPool::Handle(code.GetObjectPool())), | 337 : object_pool_(ObjectPool::Handle(code.GetObjectPool())), |
338 data_pool_index_(-1), | 338 data_pool_index_(-1), |
339 target_pool_index_(-1) { | 339 target_pool_index_(-1) { |
340 ASSERT(code.ContainsInstructionAt(pc)); | 340 ASSERT(code.ContainsInstructionAt(pc)); |
341 // Last instruction: blr ip0. | 341 // Last instruction: blr ip0. |
342 ASSERT(*(reinterpret_cast<uint32_t*>(pc) - 1) == 0xd63f0200); | 342 ASSERT(*(reinterpret_cast<uint32_t*>(pc) - 1) == 0xd63f0200); |
343 | 343 |
344 Register reg; | 344 Register reg; |
345 uword stub_load_end = | 345 uword data_load_end = |
346 InstructionPattern::DecodeLoadWordFromPool(pc - 2 * Instr::kInstrSize, | 346 InstructionPattern::DecodeLoadWordFromPool(pc - Instr::kInstrSize, |
347 ®, | 347 ®, |
348 &target_pool_index_); | 348 &data_pool_index_); |
| 349 ASSERT(reg == R5); |
| 350 InstructionPattern::DecodeLoadWordFromPool(data_load_end - Instr::kInstrSize, |
| 351 ®, |
| 352 &target_pool_index_); |
349 ASSERT(reg == CODE_REG); | 353 ASSERT(reg == CODE_REG); |
350 InstructionPattern::DecodeLoadWordFromPool(stub_load_end, | |
351 ®, | |
352 &data_pool_index_); | |
353 ASSERT(reg == R5); | |
354 } | 354 } |
355 | 355 |
356 | 356 |
357 RawObject* SwitchableCallPattern::data() const { | 357 RawObject* SwitchableCallPattern::data() const { |
358 return object_pool_.ObjectAt(data_pool_index_); | 358 return object_pool_.ObjectAt(data_pool_index_); |
359 } | 359 } |
360 | 360 |
361 | 361 |
362 RawCode* SwitchableCallPattern::target() const { | 362 RawCode* SwitchableCallPattern::target() const { |
363 return reinterpret_cast<RawCode*>( | 363 return reinterpret_cast<RawCode*>( |
(...skipping 21 matching lines...) Expand all Loading... |
385 bool ReturnPattern::IsValid() const { | 385 bool ReturnPattern::IsValid() const { |
386 Instr* bx_lr = Instr::At(pc_); | 386 Instr* bx_lr = Instr::At(pc_); |
387 const Register crn = ConcreteRegister(LR); | 387 const Register crn = ConcreteRegister(LR); |
388 const int32_t instruction = RET | (static_cast<int32_t>(crn) << kRnShift); | 388 const int32_t instruction = RET | (static_cast<int32_t>(crn) << kRnShift); |
389 return bx_lr->InstructionBits() == instruction; | 389 return bx_lr->InstructionBits() == instruction; |
390 } | 390 } |
391 | 391 |
392 } // namespace dart | 392 } // namespace dart |
393 | 393 |
394 #endif // defined TARGET_ARCH_ARM64 | 394 #endif // defined TARGET_ARCH_ARM64 |
OLD | NEW |