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Issue 2403613002: Reduce size of monomorphic checked entry. (Closed)
Patch Set: . Created 4 years, 2 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_X64) 6 #if defined(TARGET_ARCH_X64)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/heap.h" 10 #include "vm/heap.h"
(...skipping 3317 matching lines...) Expand 10 before | Expand all | Expand 10 after
3328 int3(); 3328 int3();
3329 } 3329 }
3330 ASSERT(CodeSize() == Instructions::kCheckedEntryOffset); 3330 ASSERT(CodeSize() == Instructions::kCheckedEntryOffset);
3331 } 3331 }
3332 3332
3333 3333
3334 // RDI receiver, RBX guarded cid as Smi 3334 // RDI receiver, RBX guarded cid as Smi
3335 void Assembler::MonomorphicCheckedEntry() { 3335 void Assembler::MonomorphicCheckedEntry() {
3336 Label immediate, have_cid, miss; 3336 Label immediate, have_cid, miss;
3337 Bind(&miss); 3337 Bind(&miss);
3338 movq(CODE_REG, Address(THR, Thread::monomorphic_miss_stub_offset())); 3338 jmp(Address(THR, Thread::monomorphic_miss_entry_offset()));
3339 movq(RCX, FieldAddress(CODE_REG, Code::entry_point_offset()));
3340 jmp(RCX);
3341 3339
3342 Bind(&immediate); 3340 Bind(&immediate);
3343 movq(R10, Immediate(kSmiCid)); 3341 movq(R10, Immediate(kSmiCid));
3344 jmp(&have_cid, kNearJump); 3342 jmp(&have_cid, kNearJump);
3345 3343
3346 Comment("MonomorphicCheckedEntry"); 3344 Comment("MonomorphicCheckedEntry");
3347 ASSERT(CodeSize() == Instructions::kCheckedEntryOffset); 3345 ASSERT(CodeSize() == Instructions::kCheckedEntryOffset);
3348 SmiUntag(RBX); 3346 SmiUntag(RBX);
3349 testq(RDI, Immediate(kSmiTagMask)); 3347 testq(RDI, Immediate(kSmiTagMask));
3350 j(ZERO, &immediate, kNearJump); 3348 j(ZERO, &immediate, kNearJump);
3351 3349
3352 LoadClassId(R10, RDI); 3350 LoadClassId(R10, RDI);
3353 3351
3354 Bind(&have_cid); 3352 Bind(&have_cid);
3355 cmpq(R10, RBX); 3353 cmpq(R10, RBX);
3356 j(NOT_EQUAL, &miss, Assembler::kNearJump); 3354 j(NOT_EQUAL, &miss, Assembler::kNearJump);
3355 nop();
Florian Schneider 2016/10/10 21:10:39 Why is this nop needed?
rmacnak 2016/10/11 20:31:04 IC calls in AOT store the entry as a Smi.
3357 3356
3358 // Fall through to unchecked entry. 3357 // Fall through to unchecked entry.
3359 ASSERT(CodeSize() == Instructions::kUncheckedEntryOffset); 3358 ASSERT(CodeSize() == Instructions::kUncheckedEntryOffset);
3360 ASSERT((CodeSize() & kSmiTagMask) == kSmiTag); 3359 ASSERT((CodeSize() & kSmiTagMask) == kSmiTag);
3361 } 3360 }
3362 3361
3363 3362
3364 #ifndef PRODUCT 3363 #ifndef PRODUCT
3365 void Assembler::MaybeTraceAllocation(intptr_t cid, 3364 void Assembler::MaybeTraceAllocation(intptr_t cid,
3366 Label* trace, 3365 Label* trace,
(...skipping 417 matching lines...) Expand 10 before | Expand all | Expand 10 after
3784 3783
3785 3784
3786 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3785 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3787 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters)); 3786 ASSERT((0 <= reg) && (reg < kNumberOfXmmRegisters));
3788 return xmm_reg_names[reg]; 3787 return xmm_reg_names[reg];
3789 } 3788 }
3790 3789
3791 } // namespace dart 3790 } // namespace dart
3792 3791
3793 #endif // defined TARGET_ARCH_X64 3792 #endif // defined TARGET_ARCH_X64
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