Adds simulator debugger and Stop to arm64.

runtime/vm/assembler_arm64.h

Index: runtime/vm/assembler_arm64.h
===================================================================
--- runtime/vm/assembler_arm64.h	(revision 35109)
+++ runtime/vm/assembler_arm64.h	(working copy)
@@ -326,11 +326,11 @@
   ~Assembler() { }
 
   void PopRegister(Register r) {
-    UNIMPLEMENTED();
+    Pop(r);
   }
 
   void Drop(intptr_t stack_elements) {
-    UNIMPLEMENTED();
+    add(SP, SP, Operand(stack_elements * kWordSize));
   }
 
   void Bind(Label* label);
@@ -552,6 +552,11 @@
     EmitUnconditionalBranchRegOp(RET, rn);
   }
 
+  // Exceptions.
+  void hlt(uint16_t imm) {
+    EmitExceptionGenOp(HLT, imm);
+  }
+
   // Aliases.
   void mov(Register rd, Register rn) {
     if ((rd == SP) || (rn == SP)) {
@@ -578,6 +583,12 @@
   void Pop(Register reg) {
     ldr(reg, Address(SP, 1 * kWordSize, Address::PostIndex));
   }
+  void tst(Register rn, Operand o) {
+    ands(ZR, rn, o);
+  }
+  void tsti(Register rn, uint64_t imm) {
+    andis(ZR, rn, imm);
+  }
 
   // Object pool, loading from pool, etc.
   void LoadPoolPointer(Register pp) {
@@ -812,6 +823,12 @@
     Emit(encoding);
   }
 
+  void EmitExceptionGenOp(ExceptionGenOp op, uint16_t imm) {
+    const int32_t encoding =
+        op | (static_cast<int32_t>(imm) << kImm16Shift);
+    Emit(encoding);
+  }
+
   void EmitMoveWideOp(MoveWideOp op, Register rd, uint16_t imm, int hw_idx,
                       OperandSize sz) {
     ASSERT((hw_idx >= 0) && (hw_idx <= 3));