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Side by Side Diff: test/unittests/compiler/instruction-sequence-unittest.h

Issue 2400513002: [Turbofan] Allow FP operands and vregs in InstructionSequenceTest. (Closed)
Patch Set: Rebase. Created 4 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #ifndef V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_ 5 #ifndef V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_
6 #define V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_ 6 #define V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_
7 7
8 #include <memory> 8 #include <memory>
9 9
10 #include "src/compiler/instruction.h" 10 #include "src/compiler/instruction.h"
11 #include "test/unittests/test-utils.h" 11 #include "test/unittests/test-utils.h"
12 #include "testing/gmock/include/gmock/gmock.h" 12 #include "testing/gmock/include/gmock/gmock.h"
13 13
14 namespace v8 { 14 namespace v8 {
15 namespace internal { 15 namespace internal {
16 namespace compiler { 16 namespace compiler {
17 17
18 class InstructionSequenceTest : public TestWithIsolateAndZone { 18 class InstructionSequenceTest : public TestWithIsolateAndZone {
19 public: 19 public:
20 static const int kDefaultNRegs = 8; 20 static const int kDefaultNRegs = 8;
21 static const int kNoValue = kMinInt; 21 static const int kNoValue = kMinInt;
22 static const MachineRepresentation kNoRep = MachineRepresentation::kNone;
23 static const MachineRepresentation kFloat32 = MachineRepresentation::kFloat32;
Mircea Trofin 2016/10/08 16:38:56 why do we need this re-assignment?
bbudge 2016/10/10 10:30:07 I'll use kFloat32 and kSimd128 when I add aliasing
24 static const MachineRepresentation kFloat64 = MachineRepresentation::kFloat64;
25 static const MachineRepresentation kSimd128 = MachineRepresentation::kSimd128;
22 26
23 typedef RpoNumber Rpo; 27 typedef RpoNumber Rpo;
24 28
25 struct VReg { 29 struct VReg {
26 VReg() : value_(kNoValue) {} 30 VReg() : value_(kNoValue) {}
27 VReg(PhiInstruction* phi) : value_(phi->virtual_register()) {} // NOLINT 31 VReg(PhiInstruction* phi) : value_(phi->virtual_register()) {} // NOLINT
28 explicit VReg(int value) : value_(value) {} 32 explicit VReg(int value, MachineRepresentation rep = kNoRep)
33 : value_(value), rep_(rep) {}
29 int value_; 34 int value_;
35 MachineRepresentation rep_ = kNoRep;
30 }; 36 };
31 37
32 typedef std::pair<VReg, VReg> VRegPair; 38 typedef std::pair<VReg, VReg> VRegPair;
33 39
34 enum TestOperandType { 40 enum TestOperandType {
35 kInvalid, 41 kInvalid,
36 kSameAsFirst, 42 kSameAsFirst,
37 kRegister, 43 kRegister,
38 kFixedRegister, 44 kFixedRegister,
39 kSlot, 45 kSlot,
40 kFixedSlot, 46 kFixedSlot,
41 kExplicit, 47 kExplicit,
42 kImmediate, 48 kImmediate,
43 kNone, 49 kNone,
44 kConstant, 50 kConstant,
45 kUnique, 51 kUnique,
46 kUniqueRegister 52 kUniqueRegister
47 }; 53 };
48 54
49 struct TestOperand { 55 struct TestOperand {
50 TestOperand() : type_(kInvalid), vreg_(), value_(kNoValue) {} 56 TestOperand() : type_(kInvalid), vreg_(), value_(kNoValue), rep_(kNoRep) {}
51 TestOperand(TestOperandType type, int imm) 57 explicit TestOperand(TestOperandType type)
52 : type_(type), vreg_(), value_(imm) {} 58 : type_(type), vreg_(), value_(kNoValue), rep_(kNoRep) {}
59 // For tests that do register allocation.
53 TestOperand(TestOperandType type, VReg vreg, int value = kNoValue) 60 TestOperand(TestOperandType type, VReg vreg, int value = kNoValue)
54 : type_(type), vreg_(vreg), value_(value) {} 61 : type_(type), vreg_(vreg), value_(value), rep_(vreg.rep_) {}
62 // For immediates, constants, and tests that don't do register allocation.
63 TestOperand(TestOperandType type, int value,
64 MachineRepresentation rep = kNoRep)
65 : type_(type), vreg_(), value_(value), rep_(rep) {}
55 66
56 TestOperandType type_; 67 TestOperandType type_;
57 VReg vreg_; 68 VReg vreg_;
58 int value_; 69 int value_;
70 MachineRepresentation rep_;
59 }; 71 };
60 72
61 static TestOperand Same() { return TestOperand(kSameAsFirst, VReg()); } 73 static TestOperand Same() { return TestOperand(kSameAsFirst); }
62 74
63 static TestOperand ExplicitReg(int index) { 75 static TestOperand ExplicitReg(int index) {
64 TestOperandType type = kExplicit; 76 TestOperandType type = kExplicit;
65 return TestOperand(type, VReg(), index); 77 return TestOperand(type, index);
66 } 78 }
67 79
68 static TestOperand Reg(VReg vreg, int index = kNoValue) { 80 static TestOperand Reg(VReg vreg, int index = kNoValue) {
69 TestOperandType type = kRegister; 81 TestOperandType type = (index == kNoValue) ? kRegister : kFixedRegister;
70 if (index != kNoValue) type = kFixedRegister;
71 return TestOperand(type, vreg, index); 82 return TestOperand(type, vreg, index);
72 } 83 }
73 84
74 static TestOperand Reg(int index = kNoValue) { return Reg(VReg(), index); } 85 static TestOperand Reg(int index = kNoValue,
86 MachineRepresentation rep = kNoRep) {
87 return Reg(VReg(kNoValue, rep), index);
88 }
89
90 static TestOperand FPReg(MachineRepresentation rep, int index = kNoValue) {
91 return Reg(index, rep);
92 }
75 93
76 static TestOperand Slot(VReg vreg, int index = kNoValue) { 94 static TestOperand Slot(VReg vreg, int index = kNoValue) {
77 TestOperandType type = kSlot; 95 TestOperandType type = (index == kNoValue) ? kSlot : kFixedSlot;
78 if (index != kNoValue) type = kFixedSlot;
79 return TestOperand(type, vreg, index); 96 return TestOperand(type, vreg, index);
80 } 97 }
81 98
82 static TestOperand Slot(int index = kNoValue) { return Slot(VReg(), index); } 99 static TestOperand Slot(int index = kNoValue,
100 MachineRepresentation rep = kNoRep) {
101 return Slot(VReg(kNoValue, rep), index);
102 }
83 103
84 static TestOperand Const(int index) { 104 static TestOperand Const(int index) {
85 CHECK_NE(kNoValue, index); 105 CHECK_NE(kNoValue, index);
86 return TestOperand(kConstant, VReg(), index); 106 return TestOperand(kConstant, index);
87 } 107 }
88 108
89 static TestOperand Use(VReg vreg) { return TestOperand(kNone, vreg); } 109 static TestOperand Use(VReg vreg) { return TestOperand(kNone, vreg); }
90 110
91 static TestOperand Use() { return Use(VReg()); } 111 static TestOperand Use() { return Use(VReg()); }
92 112
93 static TestOperand Unique(VReg vreg) { return TestOperand(kUnique, vreg); } 113 static TestOperand Unique(VReg vreg) { return TestOperand(kUnique, vreg); }
94 114
95 static TestOperand UniqueReg(VReg vreg) { 115 static TestOperand UniqueReg(VReg vreg) {
96 return TestOperand(kUniqueRegister, vreg); 116 return TestOperand(kUniqueRegister, vreg);
(...skipping 25 matching lines...) Expand all
122 } 142 }
123 143
124 static BlockCompletion Last() { 144 static BlockCompletion Last() {
125 BlockCompletion completion = {kBlockEnd, TestOperand(), kNoValue, kNoValue}; 145 BlockCompletion completion = {kBlockEnd, TestOperand(), kNoValue, kNoValue};
126 return completion; 146 return completion;
127 } 147 }
128 148
129 InstructionSequenceTest(); 149 InstructionSequenceTest();
130 150
131 void SetNumRegs(int num_general_registers, int num_double_registers); 151 void SetNumRegs(int num_general_registers, int num_double_registers);
152 int GetNumRegs(MachineRepresentation rep);
132 RegisterConfiguration* config(); 153 RegisterConfiguration* config();
133 InstructionSequence* sequence(); 154 InstructionSequence* sequence();
134 155
135 void StartLoop(int loop_blocks); 156 void StartLoop(int loop_blocks);
136 void EndLoop(); 157 void EndLoop();
137 void StartBlock(bool deferred = false); 158 void StartBlock(bool deferred = false);
138 Instruction* EndBlock(BlockCompletion completion = FallThrough()); 159 Instruction* EndBlock(BlockCompletion completion = FallThrough());
139 160
140 TestOperand Imm(int32_t imm = 0); 161 TestOperand Imm(int32_t imm = 0);
141 VReg Define(TestOperand output_op); 162 VReg Define(TestOperand output_op);
142 VReg Parameter(TestOperand output_op = Reg()) { return Define(output_op); } 163 VReg Parameter(TestOperand output_op = Reg()) { return Define(output_op); }
164 VReg FPParameter(MachineRepresentation rep) { return Parameter(FPReg(rep)); }
165
166 MachineRepresentation GetCanonicalRep(TestOperand op) {
167 return IsFloatingPoint(op.rep_) ? op.rep_
168 : sequence()->DefaultRepresentation();
169 }
143 170
144 Instruction* Return(TestOperand input_op_0); 171 Instruction* Return(TestOperand input_op_0);
145 Instruction* Return(VReg vreg) { return Return(Reg(vreg, 0)); } 172 Instruction* Return(VReg vreg) { return Return(Reg(vreg, 0)); }
146 173
147 PhiInstruction* Phi(VReg incoming_vreg_0 = VReg(), 174 PhiInstruction* Phi(VReg incoming_vreg_0 = VReg(),
148 VReg incoming_vreg_1 = VReg(), 175 VReg incoming_vreg_1 = VReg(),
149 VReg incoming_vreg_2 = VReg(), 176 VReg incoming_vreg_2 = VReg(),
150 VReg incoming_vreg_3 = VReg()); 177 VReg incoming_vreg_3 = VReg());
151 PhiInstruction* Phi(VReg incoming_vreg_0, size_t input_count); 178 PhiInstruction* Phi(VReg incoming_vreg_0, size_t input_count);
152 void SetInput(PhiInstruction* phi, size_t input, VReg vreg); 179 void SetInput(PhiInstruction* phi, size_t input, VReg vreg);
(...skipping 17 matching lines...) Expand all
170 TestOperand input_op_1 = TestOperand(), 197 TestOperand input_op_1 = TestOperand(),
171 TestOperand input_op_2 = TestOperand(), 198 TestOperand input_op_2 = TestOperand(),
172 TestOperand input_op_3 = TestOperand()); 199 TestOperand input_op_3 = TestOperand());
173 VReg EmitCall(TestOperand output_op, size_t input_size, TestOperand* inputs); 200 VReg EmitCall(TestOperand output_op, size_t input_size, TestOperand* inputs);
174 VReg EmitCall(TestOperand output_op, TestOperand input_op_0 = TestOperand(), 201 VReg EmitCall(TestOperand output_op, TestOperand input_op_0 = TestOperand(),
175 TestOperand input_op_1 = TestOperand(), 202 TestOperand input_op_1 = TestOperand(),
176 TestOperand input_op_2 = TestOperand(), 203 TestOperand input_op_2 = TestOperand(),
177 TestOperand input_op_3 = TestOperand()); 204 TestOperand input_op_3 = TestOperand());
178 205
179 InstructionBlock* current_block() const { return current_block_; } 206 InstructionBlock* current_block() const { return current_block_; }
180 int num_general_registers() const { return num_general_registers_; }
181 int num_double_registers() const { return num_double_registers_; }
182 207
183 // Called after all instructions have been inserted. 208 // Called after all instructions have been inserted.
184 void WireBlocks(); 209 void WireBlocks();
185 210
186 private: 211 private:
187 VReg NewReg() { return VReg(sequence()->NextVirtualRegister()); } 212 virtual bool DoesRegisterAllocation() { return true; }
Mircea Trofin 2016/10/08 16:38:56 can you mark this const, please?
bbudge 2016/10/10 10:30:07 Done.
188 213
189 static TestOperand Invalid() { return TestOperand(kInvalid, VReg()); } 214 VReg NewReg(TestOperand op = TestOperand()) {
215 int vreg = sequence()->NextVirtualRegister();
216 if (IsFloatingPoint(op.rep_))
217 sequence()->MarkAsRepresentation(op.rep_, vreg);
218 return VReg(vreg, op.rep_);
219 }
220
221 static TestOperand Invalid() { return TestOperand(kInvalid); }
190 222
191 Instruction* EmitBranch(TestOperand input_op); 223 Instruction* EmitBranch(TestOperand input_op);
192 Instruction* EmitFallThrough(); 224 Instruction* EmitFallThrough();
193 Instruction* EmitJump(); 225 Instruction* EmitJump();
194 Instruction* NewInstruction(InstructionCode code, size_t outputs_size, 226 Instruction* NewInstruction(InstructionCode code, size_t outputs_size,
195 InstructionOperand* outputs, 227 InstructionOperand* outputs,
196 size_t inputs_size = 0, 228 size_t inputs_size = 0,
197 InstructionOperand* inputs = nullptr, 229 InstructionOperand* inputs = nullptr,
198 size_t temps_size = 0, 230 size_t temps_size = 0,
199 InstructionOperand* temps = nullptr); 231 InstructionOperand* temps = nullptr);
(...skipping 45 matching lines...) Expand 10 before | Expand all | Expand 10 after
245 bool block_returns_; 277 bool block_returns_;
246 278
247 DISALLOW_COPY_AND_ASSIGN(InstructionSequenceTest); 279 DISALLOW_COPY_AND_ASSIGN(InstructionSequenceTest);
248 }; 280 };
249 281
250 } // namespace compiler 282 } // namespace compiler
251 } // namespace internal 283 } // namespace internal
252 } // namespace v8 284 } // namespace v8
253 285
254 #endif // V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_ 286 #endif // V8_UNITTESTS_COMPILER_INSTRUCTION_SEQUENCE_UNITTEST_H_
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