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Side by Side Diff: src/compiler/x64/instruction-selector-x64.cc

Issue 2398603002: [turbofan][x64] Improve code generation for external reference access. (Closed)
Patch Set: Created 4 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include <algorithm> 5 #include <algorithm>
6 6
7 #include "src/base/adapters.h" 7 #include "src/base/adapters.h"
8 #include "src/compiler/instruction-selector-impl.h" 8 #include "src/compiler/instruction-selector-impl.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/node-properties.h" 10 #include "src/compiler/node-properties.h"
(...skipping 118 matching lines...) Expand 10 before | Expand all | Expand 10 after
129 inputs[(*input_count)++] = UseRegister(index); 129 inputs[(*input_count)++] = UseRegister(index);
130 } 130 }
131 } 131 }
132 } 132 }
133 return mode; 133 return mode;
134 } 134 }
135 135
136 AddressingMode GetEffectiveAddressMemoryOperand(Node* operand, 136 AddressingMode GetEffectiveAddressMemoryOperand(Node* operand,
137 InstructionOperand inputs[], 137 InstructionOperand inputs[],
138 size_t* input_count) { 138 size_t* input_count) {
139 if (selector()->CanAddressRelativeToRootsRegister()) {
140 LoadMatcher<ExternalReferenceMatcher> m(operand);
141 if (m.index().HasValue() && m.object().HasValue()) {
142 Address const kRootsRegisterValue =
143 kRootRegisterBias +
144 reinterpret_cast<Address>(
145 selector()->isolate()->heap()->roots_array_start());
146 ptrdiff_t const delta =
147 m.index().Value() +
148 (m.object().Value().address() - kRootsRegisterValue);
149 if (is_int32(delta)) {
150 inputs[(*input_count)++] = TempImmediate(static_cast<int32_t>(delta));
151 return kMode_Root;
152 }
153 }
154 }
139 BaseWithIndexAndDisplacement64Matcher m(operand, AddressOption::kAllowAll); 155 BaseWithIndexAndDisplacement64Matcher m(operand, AddressOption::kAllowAll);
140 DCHECK(m.matches()); 156 DCHECK(m.matches());
141 if ((m.displacement() == nullptr || CanBeImmediate(m.displacement()))) { 157 if ((m.displacement() == nullptr || CanBeImmediate(m.displacement()))) {
142 return GenerateMemoryOperandInputs( 158 return GenerateMemoryOperandInputs(
143 m.index(), m.scale(), m.base(), m.displacement(), 159 m.index(), m.scale(), m.base(), m.displacement(),
144 m.displacement_mode(), inputs, input_count); 160 m.displacement_mode(), inputs, input_count);
145 } else { 161 } else {
146 inputs[(*input_count)++] = UseRegister(operand->InputAt(0)); 162 inputs[(*input_count)++] = UseRegister(operand->InputAt(0));
147 inputs[(*input_count)++] = UseRegister(operand->InputAt(1)); 163 inputs[(*input_count)++] = UseRegister(operand->InputAt(1));
148 return kMode_MR1; 164 return kMode_MR1;
149 } 165 }
150 } 166 }
151 167
152 bool CanBeBetterLeftOperand(Node* node) const { 168 bool CanBeBetterLeftOperand(Node* node) const {
153 return !selector()->IsLive(node); 169 return !selector()->IsLive(node);
154 } 170 }
155 }; 171 };
156 172
157 namespace { 173 namespace {
174
158 ArchOpcode GetLoadOpcode(LoadRepresentation load_rep) { 175 ArchOpcode GetLoadOpcode(LoadRepresentation load_rep) {
159 ArchOpcode opcode = kArchNop; 176 ArchOpcode opcode = kArchNop;
160 switch (load_rep.representation()) { 177 switch (load_rep.representation()) {
161 case MachineRepresentation::kFloat32: 178 case MachineRepresentation::kFloat32:
162 opcode = kX64Movss; 179 opcode = kX64Movss;
163 break; 180 break;
164 case MachineRepresentation::kFloat64: 181 case MachineRepresentation::kFloat64:
165 opcode = kX64Movsd; 182 opcode = kX64Movsd;
166 break; 183 break;
167 case MachineRepresentation::kBit: // Fall through. 184 case MachineRepresentation::kBit: // Fall through.
(...skipping 12 matching lines...) Expand all
180 case MachineRepresentation::kWord64: 197 case MachineRepresentation::kWord64:
181 opcode = kX64Movq; 198 opcode = kX64Movq;
182 break; 199 break;
183 case MachineRepresentation::kSimd128: // Fall through. 200 case MachineRepresentation::kSimd128: // Fall through.
184 case MachineRepresentation::kNone: 201 case MachineRepresentation::kNone:
185 UNREACHABLE(); 202 UNREACHABLE();
186 break; 203 break;
187 } 204 }
188 return opcode; 205 return opcode;
189 } 206 }
207
190 } // namespace 208 } // namespace
191 209
192 void InstructionSelector::VisitLoad(Node* node) { 210 void InstructionSelector::VisitLoad(Node* node) {
193 LoadRepresentation load_rep = LoadRepresentationOf(node->op()); 211 LoadRepresentation load_rep = LoadRepresentationOf(node->op());
194 X64OperandGenerator g(this); 212 X64OperandGenerator g(this);
195 213
196 ArchOpcode opcode = GetLoadOpcode(load_rep); 214 ArchOpcode opcode = GetLoadOpcode(load_rep);
197 InstructionOperand outputs[1]; 215 InstructionOperand outputs[1];
198 outputs[0] = g.DefineAsRegister(node); 216 outputs[0] = g.DefineAsRegister(node);
199 InstructionOperand inputs[3]; 217 InstructionOperand inputs[3];
(...skipping 516 matching lines...) Expand 10 before | Expand all | Expand 10 after
716 case kMode_None: 734 case kMode_None:
717 case kMode_MRI: 735 case kMode_MRI:
718 case kMode_MR1I: 736 case kMode_MR1I:
719 case kMode_MR2I: 737 case kMode_MR2I:
720 case kMode_MR4I: 738 case kMode_MR4I:
721 case kMode_MR8I: 739 case kMode_MR8I:
722 case kMode_M1I: 740 case kMode_M1I:
723 case kMode_M2I: 741 case kMode_M2I:
724 case kMode_M4I: 742 case kMode_M4I:
725 case kMode_M8I: 743 case kMode_M8I:
744 case kMode_Root:
726 UNREACHABLE(); 745 UNREACHABLE();
727 } 746 }
728 inputs[input_count++] = ImmediateOperand(ImmediateOperand::INLINE, 4); 747 inputs[input_count++] = ImmediateOperand(ImmediateOperand::INLINE, 4);
729 } else { 748 } else {
730 int32_t displacement = g.GetImmediateIntegerValue(mleft.displacement()); 749 int32_t displacement = g.GetImmediateIntegerValue(mleft.displacement());
731 inputs[input_count - 1] = 750 inputs[input_count - 1] =
732 ImmediateOperand(ImmediateOperand::INLINE, displacement + 4); 751 ImmediateOperand(ImmediateOperand::INLINE, displacement + 4);
733 } 752 }
734 InstructionOperand outputs[] = {g.DefineAsRegister(node)}; 753 InstructionOperand outputs[] = {g.DefineAsRegister(node)};
735 InstructionCode code = opcode | AddressingModeField::encode(mode); 754 InstructionCode code = opcode | AddressingModeField::encode(mode);
(...skipping 1555 matching lines...) Expand 10 before | Expand all | Expand 10 after
2291 // static 2310 // static
2292 MachineOperatorBuilder::AlignmentRequirements 2311 MachineOperatorBuilder::AlignmentRequirements
2293 InstructionSelector::AlignmentRequirements() { 2312 InstructionSelector::AlignmentRequirements() {
2294 return MachineOperatorBuilder::AlignmentRequirements:: 2313 return MachineOperatorBuilder::AlignmentRequirements::
2295 FullUnalignedAccessSupport(); 2314 FullUnalignedAccessSupport();
2296 } 2315 }
2297 2316
2298 } // namespace compiler 2317 } // namespace compiler
2299 } // namespace internal 2318 } // namespace internal
2300 } // namespace v8 2319 } // namespace v8
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