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Unified Diff: tests_lit/assembler/mips32/encoding_intrinsics.ll

Issue 2394773004: Subzero, MIPS32: Fix conditional mov instructions (Closed)
Patch Set: Fix typo in test file Created 4 years, 2 months ago
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Index: tests_lit/assembler/mips32/encoding_intrinsics.ll
diff --git a/tests_lit/assembler/mips32/encoding_intrinsics.ll b/tests_lit/assembler/mips32/encoding_intrinsics.ll
index 5323a223cc60eacbcff15b76f9216a776d765231..ee247d60d53fa598f8f1bd4552dd57f94ec84526 100644
--- a/tests_lit/assembler/mips32/encoding_intrinsics.ll
+++ b/tests_lit/assembler/mips32/encoding_intrinsics.ll
@@ -50,15 +50,15 @@ entry:
; ASM-NEXT: andi $v0, $v0, 65535
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encBswap16>:
-; DIS-NEXT: {{.*}} 00041200 sll v0,a0,0x8
-; DIS-NEXT: {{.*}} 3c0300ff lui v1,0xff
-; DIS-NEXT: {{.*}} 00431024 and v0,v0,v1
-; DIS-NEXT: {{.*}} 00042600 sll a0,a0,0x18
-; DIS-NEXT: {{.*}} 00821025 or v0,a0,v0
-; DIS-NEXT: {{.*}} 00021402 srl v0,v0,0x10
-; DIS-NEXT: {{.*}} 3042ffff andi v0,v0,0xffff
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encBswap16>:
+; DIS-NEXT: 00041200 sll v0,a0,0x8
+; DIS-NEXT: 3c0300ff lui v1,0xff
+; DIS-NEXT: 00431024 and v0,v0,v1
+; DIS-NEXT: 00042600 sll a0,a0,0x18
+; DIS-NEXT: 00821025 or v0,a0,v0
+; DIS-NEXT: 00021402 srl v0,v0,0x10
+; DIS-NEXT: 3042ffff andi v0,v0,0xffff
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encBswap16
; IASM-NEXT: .LencBswap16$entry:
@@ -116,19 +116,19 @@ entry:
; ASM-NEXT: move $v0, $v1
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encBswap32>:
-; DIS-NEXT: {{.*}} 00041602 srl v0,a0,0x18
-; DIS-NEXT: {{.*}} 00041a02 srl v1,a0,0x8
-; DIS-NEXT: {{.*}} 3063ff00 andi v1,v1,0xff00
-; DIS-NEXT: {{.*}} 00621025 or v0,v1,v0
-; DIS-NEXT: {{.*}} 00041a00 sll v1,a0,0x8
-; DIS-NEXT: {{.*}} 3c0500ff lui a1,0xff
-; DIS-NEXT: {{.*}} 00651824 and v1,v1,a1
-; DIS-NEXT: {{.*}} 00042600 sll a0,a0,0x18
-; DIS-NEXT: {{.*}} 00831825 or v1,a0,v1
-; DIS-NEXT: {{.*}} 00621825 or v1,v1,v0
-; DIS-NEXT: {{.*}} 00601021 move v0,v1
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encBswap32>:
+; DIS-NEXT: 00041602 srl v0,a0,0x18
+; DIS-NEXT: 00041a02 srl v1,a0,0x8
+; DIS-NEXT: 3063ff00 andi v1,v1,0xff00
+; DIS-NEXT: 00621025 or v0,v1,v0
+; DIS-NEXT: 00041a00 sll v1,a0,0x8
+; DIS-NEXT: 3c0500ff lui a1,0xff
+; DIS-NEXT: 00651824 and v1,v1,a1
+; DIS-NEXT: 00042600 sll a0,a0,0x18
+; DIS-NEXT: 00831825 or v1,a0,v1
+; DIS-NEXT: 00621825 or v1,v1,v0
+; DIS-NEXT: 00601021 move v0,v1
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encBswap32
; IASM-NEXT: .LencBswap32$entry:
@@ -212,29 +212,29 @@ entry:
; ASM-NEXT: move $v1, $a0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encBswap64>:
-; DIS-NEXT: {{.*}} 00051200 sll v0,a1,0x8
-; DIS-NEXT: {{.*}} 00051e02 srl v1,a1,0x18
-; DIS-NEXT: {{.*}} 00053202 srl a2,a1,0x8
-; DIS-NEXT: {{.*}} 30c6ff00 andi a2,a2,0xff00
-; DIS-NEXT: {{.*}} 3c0700ff lui a3,0xff
-; DIS-NEXT: {{.*}} 00c33025 or a2,a2,v1
-; DIS-NEXT: {{.*}} 00471024 and v0,v0,a3
-; DIS-NEXT: {{.*}} 00052e00 sll a1,a1,0x18
-; DIS-NEXT: {{.*}} 00a22825 or a1,a1,v0
-; DIS-NEXT: {{.*}} 00041602 srl v0,a0,0x18
-; DIS-NEXT: {{.*}} 00041a02 srl v1,a0,0x8
-; DIS-NEXT: {{.*}} 3063ff00 andi v1,v1,0xff00
-; DIS-NEXT: {{.*}} 00a62825 or a1,a1,a2
-; DIS-NEXT: {{.*}} 00621825 or v1,v1,v0
-; DIS-NEXT: {{.*}} 00041200 sll v0,a0,0x8
-; DIS-NEXT: {{.*}} 00471024 and v0,v0,a3
-; DIS-NEXT: {{.*}} 00042600 sll a0,a0,0x18
-; DIS-NEXT: {{.*}} 00822025 or a0,a0,v0
-; DIS-NEXT: {{.*}} 00832025 or a0,a0,v1
-; DIS-NEXT: {{.*}} 00a01021 move v0,a1
-; DIS-NEXT: {{.*}} 00801821 move v1,a0
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encBswap64>:
+; DIS-NEXT: 00051200 sll v0,a1,0x8
+; DIS-NEXT: 00051e02 srl v1,a1,0x18
+; DIS-NEXT: 00053202 srl a2,a1,0x8
+; DIS-NEXT: 30c6ff00 andi a2,a2,0xff00
+; DIS-NEXT: 3c0700ff lui a3,0xff
+; DIS-NEXT: 00c33025 or a2,a2,v1
+; DIS-NEXT: 00471024 and v0,v0,a3
+; DIS-NEXT: 00052e00 sll a1,a1,0x18
+; DIS-NEXT: 00a22825 or a1,a1,v0
+; DIS-NEXT: 00041602 srl v0,a0,0x18
+; DIS-NEXT: 00041a02 srl v1,a0,0x8
+; DIS-NEXT: 3063ff00 andi v1,v1,0xff00
+; DIS-NEXT: 00a62825 or a1,a1,a2
+; DIS-NEXT: 00621825 or v1,v1,v0
+; DIS-NEXT: 00041200 sll v0,a0,0x8
+; DIS-NEXT: 00471024 and v0,v0,a3
+; DIS-NEXT: 00042600 sll a0,a0,0x18
+; DIS-NEXT: 00822025 or a0,a0,v0
+; DIS-NEXT: 00832025 or a0,a0,v1
+; DIS-NEXT: 00a01021 move v0,a1
+; DIS-NEXT: 00801821 move v1,a0
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encBswap64
@@ -364,32 +364,32 @@ entry:
; ASM-NEXT: move $v1, $a0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encBswap64Undef>:
-; DIS-NEXT: {{.*}} 24020000 li v0,0
-; DIS-NEXT: {{.*}} 24030000 li v1,0
-; DIS-NEXT: {{.*}} 00032200 sll a0,v1,0x8
-; DIS-NEXT: {{.*}} 00032e02 srl a1,v1,0x18
-; DIS-NEXT: {{.*}} 00033202 srl a2,v1,0x8
-; DIS-NEXT: {{.*}} 30c6ff00 andi a2,a2,0xff00
-; DIS-NEXT: {{.*}} 3c0700ff lui a3,0xff
-; DIS-NEXT: {{.*}} 00c53025 or a2,a2,a1
-; DIS-NEXT: {{.*}} 00872024 and a0,a0,a3
-; DIS-NEXT: {{.*}} 00031e00 sll v1,v1,0x18
-; DIS-NEXT: {{.*}} 00641825 or v1,v1,a0
-; DIS-NEXT: {{.*}} 00022602 srl a0,v0,0x18
-; DIS-NEXT: {{.*}} 00022a02 srl a1,v0,0x8
-; DIS-NEXT: {{.*}} 30a5ff00 andi a1,a1,0xff00
-; DIS-NEXT: {{.*}} 00661825 or v1,v1,a2
-; DIS-NEXT: {{.*}} 00a42825 or a1,a1,a0
-; DIS-NEXT: {{.*}} 00022200 sll a0,v0,0x8
-; DIS-NEXT: {{.*}} 00872024 and a0,a0,a3
-; DIS-NEXT: {{.*}} 00021600 sll v0,v0,0x18
-; DIS-NEXT: {{.*}} 00441025 or v0,v0,a0
-; DIS-NEXT: {{.*}} 00451025 or v0,v0,a1
-; DIS-NEXT: {{.*}} 00402021 move a0,v0
-; DIS-NEXT: {{.*}} 00601021 move v0,v1
-; DIS-NEXT: {{.*}} 00801821 move v1,a0
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encBswap64Undef>:
+; DIS-NEXT: 24020000 li v0,0
+; DIS-NEXT: 24030000 li v1,0
+; DIS-NEXT: 00032200 sll a0,v1,0x8
+; DIS-NEXT: 00032e02 srl a1,v1,0x18
+; DIS-NEXT: 00033202 srl a2,v1,0x8
+; DIS-NEXT: 30c6ff00 andi a2,a2,0xff00
+; DIS-NEXT: 3c0700ff lui a3,0xff
+; DIS-NEXT: 00c53025 or a2,a2,a1
+; DIS-NEXT: 00872024 and a0,a0,a3
+; DIS-NEXT: 00031e00 sll v1,v1,0x18
+; DIS-NEXT: 00641825 or v1,v1,a0
+; DIS-NEXT: 00022602 srl a0,v0,0x18
+; DIS-NEXT: 00022a02 srl a1,v0,0x8
+; DIS-NEXT: 30a5ff00 andi a1,a1,0xff00
+; DIS-NEXT: 00661825 or v1,v1,a2
+; DIS-NEXT: 00a42825 or a1,a1,a0
+; DIS-NEXT: 00022200 sll a0,v0,0x8
+; DIS-NEXT: 00872024 and a0,a0,a3
+; DIS-NEXT: 00021600 sll v0,v0,0x18
+; DIS-NEXT: 00441025 or v0,v0,a0
+; DIS-NEXT: 00451025 or v0,v0,a1
+; DIS-NEXT: 00402021 move a0,v0
+; DIS-NEXT: 00601021 move v0,v1
+; DIS-NEXT: 00801821 move v1,a0
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encBswap64Undef
; IASM-NEXT: .LencBswap64Undef$entry:
@@ -506,10 +506,10 @@ entry:
; ASM-NEXT: move $v0, $a0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCtlz32>:
-; DIS-NEXT: {{.*}} 70842020 clz a0,a0
-; DIS-NEXT: {{.*}} 00801021 move v0,a0
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encCtlz32>:
+; DIS-NEXT: 70842020 clz a0,a0
+; DIS-NEXT: 00801021 move v0,a0
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encCtlz32
; IASM-NEXT: .LencCtlz32$entry:
@@ -539,11 +539,11 @@ entry:
; ASM-NEXT: clz $v0, $v0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCtlz32Const>:
-; DIS-NEXT: {{.*}} 3c020001 lui v0,0x1
-; DIS-NEXT: {{.*}} 3442e240 ori v0,v0,0xe240
-; DIS-NEXT: {{.*}} 70421020 clz v0,v0
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encCtlz32Const>:
+; DIS-NEXT: 3c020001 lui v0,0x1
+; DIS-NEXT: 3442e240 ori v0,v0,0xe240
+; DIS-NEXT: 70421020 clz v0,v0
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encCtlz32Const
; IASM-NEXT: .LencCtlz32Const$entry:
@@ -581,50 +581,50 @@ entry:
; ASM-NEXT: move $v0, $a0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCtlz64>:
-; DIS-NEXT: {{.*}} 70a21020 clz v0,a1
-; DIS-NEXT: {{.*}} 70842020 clz a0,a0
-; DIS-NEXT: {{.*}} 24840020 addiu a0,a0,32
-; DIS-NEXT: {{.*}} {{.*}}0b movn {{.*}}
-; DIS-NEXT: {{.*}} 24020000 li v0,0
-; DIS-NEXT: {{.*}} 00401821 move v1,v0
-; DIS-NEXT: {{.*}} 00801021 move v0,a0
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encCtlz64>:
+; DIS-NEXT: 70a21020 clz v0,a1
+; DIS-NEXT: 70842020 clz a0,a0
+; DIS-NEXT: 24840020 addiu a0,a0,32
+; DIS-NEXT: 0045200b movn a0,v0,a1
+; DIS-NEXT: 24020000 li v0,0
+; DIS-NEXT: 00401821 move v1,v0
+; DIS-NEXT: 00801021 move v0,a0
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encCtlz64
; IASM-NEXT: .LencCtlz64$entry:
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x10
-; IASM-NEXT: .byte 0xa2
-; IASM-NEXT: .byte 0x70
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x84
-; IASM-NEXT: .byte 0x70
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x84
-; IASM-NEXT: .byte 0x24
-; IASM-NEXT: .byte 0xb
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x82
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x2
-; IASM-NEXT: .byte 0x24
-; IASM-NEXT: .byte 0x21
-; IASM-NEXT: .byte 0x18
-; IASM-NEXT: .byte 0x40
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x21
-; IASM-NEXT: .byte 0x10
-; IASM-NEXT: .byte 0x80
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x8
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0xe0
-; IASM-NEXT: .byte 0x3
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x10
+; IASM-NEXT: .byte 0xa2
+; IASM-NEXT: .byte 0x70
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x84
+; IASM-NEXT: .byte 0x70
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x84
+; IASM-NEXT: .byte 0x24
+; IASM-NEXT: .byte 0xb
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x45
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x2
+; IASM-NEXT: .byte 0x24
+; IASM-NEXT: .byte 0x21
+; IASM-NEXT: .byte 0x18
+; IASM-NEXT: .byte 0x40
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x21
+; IASM-NEXT: .byte 0x10
+; IASM-NEXT: .byte 0x80
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x8
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0xe0
+; IASM-NEXT: .byte 0x3
define internal i32 @encCtlz64Const(i64 %x) {
entry:
@@ -646,55 +646,55 @@ entry:
; ASM-NEXT: move $v0, $v1
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCtlz64Const>:
-; DIS-NEXT: {{.*}} 2402001c li v0,28
-; DIS-NEXT: {{.*}} 3c03be99 lui v1,0xbe99
-; DIS-NEXT: {{.*}} 34631a14 ori v1,v1,0x1a14
-; DIS-NEXT: {{.*}} 70442020 clz a0,v0
-; DIS-NEXT: {{.*}} 70631820 clz v1,v1
-; DIS-NEXT: {{.*}} 24630020 addiu v1,v1,32
-; DIS-NEXT: {{.*}} {{.*}}0b movn {{.*}}
-; DIS-NEXT: {{.*}} 00601021 move v0,v1
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encCtlz64Const>:
+; DIS-NEXT: 2402001c li v0,28
+; DIS-NEXT: 3c03be99 lui v1,0xbe99
+; DIS-NEXT: 34631a14 ori v1,v1,0x1a14
+; DIS-NEXT: 70442020 clz a0,v0
+; DIS-NEXT: 70631820 clz v1,v1
+; DIS-NEXT: 24630020 addiu v1,v1,32
+; DIS-NEXT: 0082180b movn v1,a0,v0
+; DIS-NEXT: 00601021 move v0,v1
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encCtlz64Const
; IASM-NEXT: .LencCtlz64Const$entry:
-; IASM-NEXT: .byte 0x1c
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x2
-; IASM-NEXT: .byte 0x24
-; IASM-NEXT: .byte 0x99
-; IASM-NEXT: .byte 0xbe
-; IASM-NEXT: .byte 0x3
-; IASM-NEXT: .byte 0x3c
-; IASM-NEXT: .byte 0x14
-; IASM-NEXT: .byte 0x1a
-; IASM-NEXT: .byte 0x63
-; IASM-NEXT: .byte 0x34
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x44
-; IASM-NEXT: .byte 0x70
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x18
-; IASM-NEXT: .byte 0x63
-; IASM-NEXT: .byte 0x70
-; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x63
-; IASM-NEXT: .byte 0x24
-; IASM-NEXT: .byte 0xb
-; IASM-NEXT: .byte 0x18
-; IASM-NEXT: .byte 0x64
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x21
-; IASM-NEXT: .byte 0x10
-; IASM-NEXT: .byte 0x60
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0x8
-; IASM-NEXT: .byte 0x0
-; IASM-NEXT: .byte 0xe0
-; IASM-NEXT: .byte 0x3
+; IASM-NEXT: .byte 0x1c
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x2
+; IASM-NEXT: .byte 0x24
+; IASM-NEXT: .byte 0x99
+; IASM-NEXT: .byte 0xbe
+; IASM-NEXT: .byte 0x3
+; IASM-NEXT: .byte 0x3c
+; IASM-NEXT: .byte 0x14
+; IASM-NEXT: .byte 0x1a
+; IASM-NEXT: .byte 0x63
+; IASM-NEXT: .byte 0x34
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x44
+; IASM-NEXT: .byte 0x70
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x18
+; IASM-NEXT: .byte 0x63
+; IASM-NEXT: .byte 0x70
+; IASM-NEXT: .byte 0x20
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x63
+; IASM-NEXT: .byte 0x24
+; IASM-NEXT: .byte 0xb
+; IASM-NEXT: .byte 0x18
+; IASM-NEXT: .byte 0x82
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x21
+; IASM-NEXT: .byte 0x10
+; IASM-NEXT: .byte 0x60
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0x8
+; IASM-NEXT: .byte 0x0
+; IASM-NEXT: .byte 0xe0
+; IASM-NEXT: .byte 0x3
define internal i32 @encCttz32(i32 %x) {
entry:
@@ -712,14 +712,14 @@ entry:
; ASM-NEXT: subu $v0, $v0, $a0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCttz32>:
-; DIS-NEXT: {{.*}} 2482ffff addiu v0,a0,-1
-; DIS-NEXT: {{.*}} 00802027 nor a0,a0,zero
-; DIS-NEXT: {{.*}} 00822024 and a0,a0,v0
-; DIS-NEXT: {{.*}} 70842020 clz a0,a0
-; DIS-NEXT: {{.*}} 24020020 li v0,32
-; DIS-NEXT: {{.*}} 00441023 subu v0,v0,a0
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encCttz32>:
+; DIS-NEXT: 2482ffff addiu v0,a0,-1
+; DIS-NEXT: 00802027 nor a0,a0,zero
+; DIS-NEXT: 00822024 and a0,a0,v0
+; DIS-NEXT: 70842020 clz a0,a0
+; DIS-NEXT: 24020020 li v0,32
+; DIS-NEXT: 00441023 subu v0,v0,a0
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encCttz32
; IASM-NEXT: .LencCttz32$entry:
@@ -771,17 +771,17 @@ entry:
; ASM-NEXT: move $v0, $v1
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCttz32Const>:
-; DIS-NEXT: {{.*}} 3c020001 lui v0,0x1
-; DIS-NEXT: {{.*}} ori v0,v0,0xe240
-; DIS-NEXT: {{.*}} addiu v1,v0,-1
-; DIS-NEXT: {{.*}} nor v0,v0,zero
-; DIS-NEXT: {{.*}} and v0,v0,v1
-; DIS-NEXT: {{.*}} clz v0,v0
-; DIS-NEXT: {{.*}} li v1,32
-; DIS-NEXT: {{.*}} subu v1,v1,v0
-; DIS-NEXT: {{.*}} move v0,v1
-; DIS-NEXT: {{.*}} jr ra
+; DIS-LABEL: <encCttz32Const>:
+; DIS-NEXT: 3c020001 lui v0,0x1
+; DIS-NEXT: 3442e240 ori v0,v0,0xe240
+; DIS-NEXT: 2443ffff addiu v1,v0,-1
+; DIS-NEXT: 00401027 nor v0,v0,zero
+; DIS-NEXT: 00431024 and v0,v0,v1
+; DIS-NEXT: 70421020 clz v0,v0
+; DIS-NEXT: 24030020 li v1,32
+; DIS-NEXT: 00621823 subu v1,v1,v0
+; DIS-NEXT: 00601021 move v0,v1
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encCttz32Const:
; IASM-NEXT: .LencCttz32Const$entry:
@@ -850,22 +850,23 @@ entry:
; ASM-NEXT: addiu $v1, $zero, 0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCttz64>:
-; DIS-NEXT: {{.*}} 24a2ffff addiu v0,a1,-1
-; DIS-NEXT: {{.*}} 00a02827 nor a1,a1,zero
-; DIS-NEXT: {{.*}} 00a22824 and a1,a1,v0
-; DIS-NEXT: {{.*}} 70a52820 clz a1,a1
-; DIS-NEXT: {{.*}} 24020040 li v0,64
-; DIS-NEXT: {{.*}} 00451023 subu v0,v0,a1
-; DIS-NEXT: {{.*}} 2483ffff addiu v1,a0,-1
-; DIS-NEXT: {{.*}} 00802827 nor a1,a0,zero
-; DIS-NEXT: {{.*}} 00a32824 and a1,a1,v1
-; DIS-NEXT: {{.*}} 70a52820 clz a1,a1
-; DIS-NEXT: {{.*}} 24030020 li v1,32
-; DIS-NEXT: {{.*}} 00651823 subu v1,v1,a1
-; DIS-NEXT: {{.*}} {{.*}}0b movn {{.*}}
-; DIS-NEXT: {{.*}} 24030000 li v1,0
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encCttz64>:
+; DIS-NEXT: 24a2ffff addiu v0,a1,-1
+; DIS-NEXT: 00a02827 nor a1,a1,zero
+; DIS-NEXT: 00a22824 and a1,a1,v0
+; DIS-NEXT: 70a52820 clz a1,a1
+; DIS-NEXT: 24020040 li v0,64
+; DIS-NEXT: 00451023 subu v0,v0,a1
+; DIS-NEXT: 2483ffff addiu v1,a0,-1
+; DIS-NEXT: 00802827 nor a1,a0,zero
+; DIS-NEXT: 00a32824 and a1,a1,v1
+; DIS-NEXT: 70a52820 clz a1,a1
+; DIS-NEXT: 24030020 li v1,32
+; DIS-NEXT: 00651823 subu v1,v1,a1
+; DIS-NEXT: 0064100b movn v0,v1,a0
+; DIS-NEXT: 24030000 li v1,0
+; DIS-NEXT: 03e00008 jr ra
+; DIS-NEXT: 00000000 nop
; IASM-LABEL: encCttz64:
; IASM-NEXT: .LencCttz64$entry:
@@ -919,7 +920,7 @@ entry:
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0xb
; IASM-NEXT: .byte 0x10
-; IASM-NEXT: .byte 0x43
+; IASM-NEXT: .byte 0x64
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x0
@@ -960,27 +961,27 @@ entry:
; ASM-NEXT: move $v0, $a0
; ASM-NEXT: jr $ra
-; DIS-LABEL: {{.*}} <encCttz64Const>:
-; DIS-NEXT: {{.*}} 2402001c li v0,28
-; DIS-NEXT: {{.*}} 3c03be99 lui v1,0xbe99
-; DIS-NEXT: {{.*}} 34631a14 ori v1,v1,0x1a14
-; DIS-NEXT: {{.*}} 2444ffff addiu a0,v0,-1
-; DIS-NEXT: {{.*}} 00401027 nor v0,v0,zero
-; DIS-NEXT: {{.*}} 00441024 and v0,v0,a0
-; DIS-NEXT: {{.*}} 70421020 clz v0,v0
-; DIS-NEXT: {{.*}} 24040040 li a0,64
-; DIS-NEXT: {{.*}} 00822023 subu a0,a0,v0
-; DIS-NEXT: {{.*}} 2462ffff addiu v0,v1,-1
-; DIS-NEXT: {{.*}} 00602827 nor a1,v1,zero
-; DIS-NEXT: {{.*}} 00a22824 and a1,a1,v0
-; DIS-NEXT: {{.*}} 70a52820 clz a1,a1
-; DIS-NEXT: {{.*}} 24020020 li v0,32
-; DIS-NEXT: {{.*}} 00451023 subu v0,v0,a1
-; DIS-NEXT: {{.*}} {{.*}}0b movn {{.*}}
-; DIS-NEXT: {{.*}} 24{{.*}} li {{.*}},0
-; DIS-NEXT: {{.*}} {{.*}}21 move v1,{{.*}}
-; DIS-NEXT: {{.*}} {{.*}}21 move v0,{{.*}}
-; DIS-NEXT: {{.*}} 03e00008 jr ra
+; DIS-LABEL: <encCttz64Const>:
+; DIS-NEXT: 2402001c li v0,28
+; DIS-NEXT: 3c03be99 lui v1,0xbe99
+; DIS-NEXT: 34631a14 ori v1,v1,0x1a14
+; DIS-NEXT: 2444ffff addiu a0,v0,-1
+; DIS-NEXT: 00401027 nor v0,v0,zero
+; DIS-NEXT: 00441024 and v0,v0,a0
+; DIS-NEXT: 70421020 clz v0,v0
+; DIS-NEXT: 24040040 li a0,64
+; DIS-NEXT: 00822023 subu a0,a0,v0
+; DIS-NEXT: 2462ffff addiu v0,v1,-1
+; DIS-NEXT: 00602827 nor a1,v1,zero
+; DIS-NEXT: 00a22824 and a1,a1,v0
+; DIS-NEXT: 70a52820 clz a1,a1
+; DIS-NEXT: 24020020 li v0,32
+; DIS-NEXT: 00451023 subu v0,v0,a1
+; DIS-NEXT: 0043200b movn a0,v0,v1
+; DIS-NEXT: 24020000 li v0,0
+; DIS-NEXT: 00401821 move v1,v0
+; DIS-NEXT: 00801021 move v0,a0
+; DIS-NEXT: 03e00008 jr ra
; IASM-LABEL: encCttz64Const:
; IASM-NEXT: .LencCttz64Const$entry:
@@ -1046,7 +1047,7 @@ entry:
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0xb
; IASM-NEXT: .byte 0x20
-; IASM-NEXT: .byte 0x82
+; IASM-NEXT: .byte 0x43
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x0
; IASM-NEXT: .byte 0x0
@@ -1073,8 +1074,8 @@ define internal void @encTrap() {
; ASM-NEXT: .LencTrap$__0:
; ASM-NEXT: teq $zero, $zero, 0
-; DIS-LABEL: {{.*}} <encTrap>:
-; DIS-NEXT: {{.*}} 00000034 teq zero,zero
+; DIS-LABEL: <encTrap>:
+; DIS-NEXT: 00000034 teq zero,zero
; IASM-LABEL: encTrap:
; IASM-NEXT: .LencTrap$__0:
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