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1 // Copyright 2010 the V8 project authors. All rights reserved. | 1 // Copyright 2010 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 // This file is an internal atomic implementation, use atomicops.h instead. | 5 // This file is an internal atomic implementation, use atomicops.h instead. |
6 | 6 |
7 #ifndef V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ | 7 #ifndef V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ |
8 #define V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ | 8 #define V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ |
9 | 9 |
10 #include "src/base/base-export.h" | |
11 | |
12 namespace v8 { | 10 namespace v8 { |
13 namespace base { | 11 namespace base { |
14 | 12 |
15 // This struct is not part of the public API of this module; clients may not | 13 // This struct is not part of the public API of this module; clients may not |
16 // use it. | 14 // use it. |
17 // Features of this x86. Values may not be correct before main() is run, | 15 // Features of this x86. Values may not be correct before main() is run, |
18 // but are set conservatively. | 16 // but are set conservatively. |
19 struct AtomicOps_x86CPUFeatureStruct { | 17 struct AtomicOps_x86CPUFeatureStruct { |
20 bool has_amd_lock_mb_bug; // Processor has AMD memory-barrier bug; do lfence | 18 bool has_amd_lock_mb_bug; // Processor has AMD memory-barrier bug; do lfence |
21 // after acquire compare-and-swap. | 19 // after acquire compare-and-swap. |
22 #if !defined(__SSE2__) | 20 #if !defined(__SSE2__) |
23 bool has_sse2; // Processor has SSE2. | 21 bool has_sse2; // Processor has SSE2. |
24 #endif | 22 #endif |
25 }; | 23 }; |
26 V8_BASE_EXPORT extern struct AtomicOps_x86CPUFeatureStruct | 24 extern struct AtomicOps_x86CPUFeatureStruct AtomicOps_Internalx86CPUFeatures; |
27 AtomicOps_Internalx86CPUFeatures; | |
28 | 25 |
29 #define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory") | 26 #define ATOMICOPS_COMPILER_BARRIER() __asm__ __volatile__("" : : : "memory") |
30 | 27 |
31 // 32-bit low-level operations on any platform. | 28 // 32-bit low-level operations on any platform. |
32 | 29 |
33 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, | 30 inline Atomic32 NoBarrier_CompareAndSwap(volatile Atomic32* ptr, |
34 Atomic32 old_value, | 31 Atomic32 old_value, |
35 Atomic32 new_value) { | 32 Atomic32 new_value) { |
36 Atomic32 prev; | 33 Atomic32 prev; |
37 __asm__ __volatile__("lock; cmpxchgl %1,%2" | 34 __asm__ __volatile__("lock; cmpxchgl %1,%2" |
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269 } | 266 } |
270 | 267 |
271 #endif // defined(__x86_64__) | 268 #endif // defined(__x86_64__) |
272 | 269 |
273 } // namespace base | 270 } // namespace base |
274 } // namespace v8 | 271 } // namespace v8 |
275 | 272 |
276 #undef ATOMICOPS_COMPILER_BARRIER | 273 #undef ATOMICOPS_COMPILER_BARRIER |
277 | 274 |
278 #endif // V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ | 275 #endif // V8_BASE_ATOMICOPS_INTERNALS_X86_GCC_H_ |
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