Adds object pool, LoadImmediate, and LoadObject to ARM64.

runtime/vm/constants_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_CONSTANTS_ARM64_H_
 #define VM_CONSTANTS_ARM64_H_
 
 #include "platform/assert.h"
 
 namespace dart {
@@ skipping 91 matching lines @@
 
 // Architecture independent aliases.
 typedef VRegister FpuRegister;
 const FpuRegister FpuTMP = VTMP0;
 const int kNumberOfFpuRegisters = kNumberOfVRegisters;
 const FpuRegister kNoFpuRegister = kNoVRegister;
 
 // Register aliases.
 const Register TMP = R16;  // Used as scratch register by assembler.
 const Register TMP2 = R17;
-const Register CTX = R27;  // Caches current context in generated code.
-const Register PP = R26;  // Caches object pool pointer in generated code.
+const Register CTX = R28;  // Caches current context in generated code.
+const Register PP = R27;  // Caches object pool pointer in generated code.
 const Register SPREG = R31;  // Stack pointer register.
 const Register FPREG = FP;  // Frame pointer register.
 const Register ICREG = R5;  // IC data register.
 
 // Exception object is passed in this register to the catch handlers when an
 // exception is thrown.
 const Register kExceptionObjectReg = R0;
 
 // Stack trace object is passed in this register to the catch handlers when
 // an exception is thrown.
@@ skipping 190 matching lines @@
   RET = BR | B22,
 };
 
 enum LoadStoreRegOp {
   LoadStoreRegMask = 0x3a000000,
   LoadStoreRegFixed = LoadStoreFixed | B29 | B28,
   STR = LoadStoreRegFixed,
   LDR = LoadStoreRegFixed | B22,
 };
 
+// C3.3.5
+enum LoadRegLiteralOp {
+  LoadRegLiteralMask = 0x3b000000,
+  LoadRegLiteralFixed = LoadStoreFixed | B28,
+  LDRpc = LoadRegLiteralFixed,
+};
+
 // C3.4.1
 enum AddSubImmOp {
   AddSubImmMask = 0x1f000000,
   AddSubImmFixed = DPImmediateFixed | B24,
   ADDI = AddSubImmFixed,
   SUBI = AddSubImmFixed | B30,
 };
 
 // C3.4.4
 enum LogicalImmOp {
@@ skipping 70 matching lines @@
 _V(DPSimd1)                                                                    \
 _V(DPSimd2)                                                                    \
 _V(CompareAndBranch)                                                           \
 _V(ConditionalBranch)                                                          \
 _V(ExceptionGen)                                                               \
 _V(System)                                                                     \
 _V(TestAndBranch)                                                              \
 _V(UnconditionalBranch)                                                        \
 _V(UnconditionalBranchReg)                                                     \
 _V(LoadStoreReg)                                                               \
+_V(LoadRegLiteral)                                                             \
 _V(AddSubImm)                                                                  \
 _V(LogicalImm)                                                                 \
 _V(MoveWide)                                                                   \
 _V(PCRel)                                                                      \
 _V(AddSubShiftExt)                                                             \
 _V(MiscDP2Source)                                                              \
 _V(MiscDP3Source)                                                              \
 _V(LogicalShift)                                                               \
 
 
@@ skipping 339 matching lines @@
   static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
 
  private:
   DISALLOW_ALLOCATION();
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
 };
 
 }  // namespace dart
 
 #endif  // VM_CONSTANTS_ARM64_H_