Teaches the register allocator about a second assembler temporary.

runtime/vm/constants_arm64.h

 // Copyright (c) 2014, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #ifndef VM_CONSTANTS_ARM64_H_
 #define VM_CONSTANTS_ARM64_H_
 
 #include "platform/assert.h"
 
 namespace dart {
 
 enum Register {
   kFirstFreeCpuRegister = 0,
   R0  =  0,
   R1  =  1,
   R2  =  2,
   R3  =  3,
   R4  =  4,
   R5  =  5,
   R6  =  6,
   R7  =  7,
   R8  =  8,
   R9  =  9,
   R10 = 10,
   R11 = 11,
   R12 = 12,
   R13 = 13,
   R14 = 14,
   R15 = 15,
-  R16 = 16,
-  R17 = 17,
+  R16 = 16,  // IP0 aka TMP
+  R17 = 17,  // IP1 aka TMP2
   R18 = 18,
   R19 = 19,
   R20 = 20,
   R21 = 21,
   R22 = 22,
   R23 = 23,
   R24 = 24,
-  kLastFreeCpuRegister = 24,
-  R25 = 25,  // IP0
-  R26 = 26,  // IP1
+  R25 = 25,
+  R26 = 26,
+  kLastFreeCpuRegister = 26,
   R27 = 27,  // PP
   R28 = 28,  // CTX
   R29 = 29,  // FP
   R30 = 30,  // LR
   R31 = 31,  // ZR, SP
   kNumberOfCpuRegisters = 32,
   kNoRegister = -1,
 
   // These registers both use the encoding R31, but to avoid mistakes we give
   // them different values, and then translate before encoding.
   SP = 32,
   ZR = 33,
 
   // Aliases.
-  IP0 = R25,
-  IP1 = R26,
+  IP0 = R16,
+  IP1 = R17,
   FP = R29,
   LR = R30,
 };
 
 enum VRegister {
   V0  =  0,
   V1  =  1,
   V2  =  2,
   V3  =  3,
   V4  =  4,
@@ skipping 32 matching lines @@
 const VRegister VTMP0 = V30;
 const VRegister VTMP1 = V31;
 
 // Architecture independent aliases.
 typedef VRegister FpuRegister;
 const FpuRegister FpuTMP = VTMP0;
 const int kNumberOfFpuRegisters = kNumberOfVRegisters;
 const FpuRegister kNoFpuRegister = kNoVRegister;
 
 // Register aliases.
-const Register TMP = R25;  // Used as scratch register by assembler.
-const Register TMP0 = R25;
-const Register TMP1 = R26;
+const Register TMP = R16;  // Used as scratch register by assembler.
+const Register TMP2 = R17;
 const Register CTX = R27;  // Caches current context in generated code.
 const Register PP = R26;  // Caches object pool pointer in generated code.
 const Register SPREG = R31;  // Stack pointer register.
 const Register FPREG = FP;  // Frame pointer register.
 const Register ICREG = R5;  // IC data register.
 
 // Exception object is passed in this register to the catch handlers when an
 // exception is thrown.
 const Register kExceptionObjectReg = R0;
 
@@ skipping 24 matching lines @@
 const VRegister kAbiFirstPreservedFpuReg = V8;
 const VRegister kAbiLastPreservedFpuReg = V15;
 const int kAbiPreservedFpuRegCount = 8;
 
 // CPU registers available to Dart allocator.
 const RegList kDartAvailableCpuRegs =
     (1 << R0)  | (1 << R1)  | (1 << R2)  | (1 << R3)  |
     (1 << R4)  | (1 << R5)  | (1 << R6)  | (1 << R7)  |
     (1 << R8)  | (1 << R9)  | (1 << R10) | (1 << R11) |
     (1 << R12) | (1 << R13) | (1 << R14) | (1 << R15) |
-    (1 << R16) | (1 << R17) | (1 << R18) | (1 << R19) |
-    (1 << R20) | (1 << R21) | (1 << R22) | (1 << R23) |
-    (1 << R24);
+    (1 << R18) | (1 << R19) | (1 << R20) | (1 << R21) |
+    (1 << R22) | (1 << R23) | (1 << R24) | (1 << R25) |
+    (1 << R26);
 
 // Registers available to Dart that are not preserved by runtime calls.
 const RegList kDartVolatileCpuRegs =
     kDartAvailableCpuRegs & ~kAbiPreservedCpuRegs;
-const int kDartVolatileCpuRegCount = 19;
+const int kDartVolatileCpuRegCount = 17;
 const VRegister kDartFirstVolatileFpuReg = V0;
 const VRegister kDartLastVolatileFpuReg = V7;
 const int kDartVolatileFpuRegCount = 8;
 
 static inline Register ConcreteRegister(Register r) {
   return ((r == ZR) || (r == SP)) ? R31 : r;
 }
 
 // Values for the condition field as defined in section A3.2.
 enum Condition {
@@ skipping 589 matching lines @@
   static Instr* At(uword pc) { return reinterpret_cast<Instr*>(pc); }
 
  private:
   DISALLOW_ALLOCATION();
   DISALLOW_IMPLICIT_CONSTRUCTORS(Instr);
 };
 
 }  // namespace dart
 
 #endif  // VM_CONSTANTS_ARM64_H_