VM: Make optimized try-catch work in DBC.

runtime/vm/flow_graph_allocator.cc

 // Copyright (c) 2013, the Dart project authors.  Please see the AUTHORS file
 // for details. All rights reserved. Use of this source code is governed by a
 // BSD-style license that can be found in the LICENSE file.
 
 #include "vm/flow_graph_allocator.h"
 
 #include "vm/bit_vector.h"
 #include "vm/intermediate_language.h"
 #include "vm/il_printer.h"
 #include "vm/flow_graph.h"
 #include "vm/flow_graph_compiler.h"
 #include "vm/log.h"
 #include "vm/parser.h"
+#include "vm/stack_frame.h"
 
 namespace dart {
 
 #if defined(DEBUG)
 #define TRACE_ALLOC(statement)                                                 \
   do {                                                                         \
     if (FLAG_trace_ssa_allocator) statement;                                   \
   } while (0)
 #else
 #define TRACE_ALLOC(statement)
@@ skipping 581 matching lines @@
           range->MarkHasOnlyUnconstrainedUsesInLoop(block_info->loop_id());
         }
       }
     }
 
     if (block->IsJoinEntry()) {
       ConnectIncomingPhiMoves(block->AsJoinEntry());
     } else if (block->IsCatchBlockEntry()) {
       // Process initial definitions.
       CatchBlockEntryInstr* catch_entry = block->AsCatchBlockEntry();
-#if defined(TARGET_ARCH_DBC)
-      // TODO(vegorov) support try-catch/finally for DBC.
-      flow_graph_.parsed_function().Bailout("FlowGraphAllocator", "Catch");
-#endif
 
       ProcessEnvironmentUses(catch_entry, catch_entry);  // For lazy deopt
 
       for (intptr_t i = 0;
            i < catch_entry->initial_definitions()->length();
            i++) {
         Definition* defn = (*catch_entry->initial_definitions())[i];
         LiveRange* range = GetLiveRange(defn->ssa_temp_index());
         range->DefineAt(catch_entry->start_pos());  // Defined at block entry.
         ProcessInitialDefinition(defn, range, catch_entry);
       }
       // Block the two fixed registers used by CatchBlockEntryInstr from the
       // block start to until the end of the instruction so that they are
       // preserved.
       intptr_t start = catch_entry->start_pos();
-      BlockLocation(Location::RegisterLocation(kExceptionObjectReg),
+#if !defined(TARGET_ARCH_DBC)
+      const Register exception_reg = kExceptionObjectReg;
+      const Register stacktrace_reg = kStackTraceObjectReg;
+#else
+      const intptr_t exception_reg =
+          LocalVarIndex(0, catch_entry->exception_var().index());
+      const intptr_t stacktrace_reg =
+          LocalVarIndex(0, catch_entry->stacktrace_var().index());
+#endif
+      BlockLocation(Location::RegisterLocation(exception_reg),
                     start,
                     ToInstructionEnd(start));
-      BlockLocation(Location::RegisterLocation(kStackTraceObjectReg),
+      BlockLocation(Location::RegisterLocation(stacktrace_reg),
                     start,
                     ToInstructionEnd(start));
     }
   }
 
   // Process incoming parameters and constants.  Do this after all other
   // instructions so that safepoints for all calls have already been found.
   GraphEntryInstr* graph_entry = flow_graph_.graph_entry();
   for (intptr_t i = 0; i < graph_entry->initial_definitions()->length(); i++) {
     Definition* defn = (*graph_entry->initial_definitions())[i];
     ASSERT(!defn->HasPairRepresentation());
     LiveRange* range = GetLiveRange(defn->ssa_temp_index());
     range->AddUseInterval(graph_entry->start_pos(), graph_entry->end_pos());
     range->DefineAt(graph_entry->start_pos());
     ProcessInitialDefinition(defn, range, graph_entry);
   }
 }
 
 
 void FlowGraphAllocator::ProcessInitialDefinition(Definition* defn,
                                                   LiveRange* range,
                                                   BlockEntryInstr* block) {
+#if !defined(TARGET_ARCH_DBC)
   // Save the range end because it may change below.
   intptr_t range_end = range->End();
+#endif
   if (defn->IsParameter()) {
     ParameterInstr* param = defn->AsParameter();
     // Assert that copied and non-copied parameters are mutually exclusive.
     // This might change in the future and, if so, the index will be wrong.
     ASSERT((flow_graph_.num_copied_params() == 0) ||
            (flow_graph_.num_non_copied_params() == 0));
     intptr_t slot_index = param->index();
     ASSERT((param->base_reg() == FPREG) || (param->base_reg() == SPREG));
     if (param->base_reg() == FPREG) {
       // Slot index for the leftmost copied parameter is 0.
       // Slot index for the rightmost fixed parameter is -1.
       slot_index -= flow_graph_.num_non_copied_params();
     }
 
 #if defined(TARGET_ARCH_DBC)
     ASSERT(param->base_reg() == FPREG);
     if (slot_index >= 0) {
       AssignSafepoints(defn, range);
       range->finger()->Initialize(range);
       range->set_assigned_location(Location::RegisterLocation(slot_index));
-      if (range->End() > kNormalEntryPos) {
+      if (block->IsGraphEntry() && (range->End() > kNormalEntryPos)) {
         LiveRange* tail = range->SplitAt(kNormalEntryPos);
         CompleteRange(tail, Location::kRegister);
       }
       ConvertAllUses(range);
       return;
     }
 #endif  // defined(TARGET_ARCH_DBC)
     range->set_assigned_location(Location::StackSlot(slot_index,
                                                      param->base_reg()));
     range->set_spill_slot(Location::StackSlot(slot_index,
@@ skipping 25 matching lines @@
   range->finger()->Initialize(range);
   UsePosition* use =
       range->finger()->FirstRegisterBeneficialUse(block->start_pos());
   if (use != NULL) {
     LiveRange* tail =
         SplitBetween(range, block->start_pos(), use->pos());
     // Parameters and constants are tagged, so allocated to CPU registers.
     CompleteRange(tail, Location::kRegister);
   }
   ConvertAllUses(range);
   if (defn->IsParameter() && (range->spill_slot().stack_index() >= 0)) {

[Vyacheslav Egorov (Google), 2016/10/04 17:07:54]

I thought we don't support spilling on DBC. How does this work (e.g. where is
the code that ensures that register numbers for live SSA values and register
numbers for spill space for local variables do not intersect?)

[Florian Schneider, 2016/10/04 17:11:02]

You're right. This should be UNREACHABLE() in DBC...

[Vyacheslav Egorov (Google), 2016/10/04 17:55:31]

I am still not completely sure how this stuff manages to work on DBC...

I need to patch this in and look at generated bytecode to convince myself :) I
will do it tomorrow morning. Hope this delay is ok.

+#if !defined(TARGET_ARCH_DBC)
     // Parameters above the frame pointer consume spill slots and are marked
     // in stack maps.
     spill_slots_.Add(range_end);
     quad_spill_slots_.Add(false);
     untagged_spill_slots_.Add(false);
     // Note, all incoming parameters are assumed to be tagged.
     MarkAsObjectAtSafepoints(range);
   } else if (defn->IsConstant() && block->IsCatchBlockEntry()) {
     // Constants at catch block entries consume spill slots.
     spill_slots_.Add(range_end);
     quad_spill_slots_.Add(false);
     untagged_spill_slots_.Add(false);
+#else
+    MarkAsObjectAtSafepoints(range);
+#endif
   }
 }
 
 
 static Location::Kind RegisterKindFromPolicy(Location loc) {
   if (loc.policy() == Location::kRequiresFpuRegister) {
     return Location::kFpuRegister;
   } else {
     return Location::kRegister;
   }
@@ skipping 2362 matching lines @@
       FlowGraphPrinter printer(flow_graph_, true);
       printer.PrintBlocks();
 #endif
     }
     THR_Print("----------------------------------------------\n");
   }
 }
 
 
 }  // namespace dart