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Side by Side Diff: src/compiler/x64/code-generator-x64.cc

Issue 2385393002: [wasm] Implement I32x4ReplaceLane, I32x4Add, I32x4Sub. (Closed)
Patch Set: Bill's review Created 4 years, 2 months ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include "src/compilation-info.h" 7 #include "src/compilation-info.h"
8 #include "src/compiler/code-generator-impl.h" 8 #include "src/compiler/code-generator-impl.h"
9 #include "src/compiler/gap-resolver.h" 9 #include "src/compiler/gap-resolver.h"
10 #include "src/compiler/node-matchers.h" 10 #include "src/compiler/node-matchers.h"
(...skipping 2066 matching lines...) Expand 10 before | Expand all | Expand 10 after
2077 XMMRegister dst = i.OutputSimd128Register(); 2077 XMMRegister dst = i.OutputSimd128Register();
2078 __ Movd(dst, i.InputRegister(0)); 2078 __ Movd(dst, i.InputRegister(0));
2079 __ shufps(dst, dst, 0x0); 2079 __ shufps(dst, dst, 0x0);
2080 break; 2080 break;
2081 } 2081 }
2082 case kX64Int32x4ExtractLane: { 2082 case kX64Int32x4ExtractLane: {
2083 CpuFeatureScope sse_scope(masm(), SSE4_1); 2083 CpuFeatureScope sse_scope(masm(), SSE4_1);
2084 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); 2084 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
2085 break; 2085 break;
2086 } 2086 }
2087 case kX64Int32x4ReplaceLane: {
2088 CpuFeatureScope sse_scope(masm(), SSE4_1);
2089 XMMRegister dst = i.OutputSimd128Register();
2090 if (instr->InputAt(2)->IsRegister()) {
2091 __ Pinsrd(i.InputSimd128Register(0), i.InputRegister(2),
2092 i.InputInt8(1));
2093 } else {
2094 __ Pinsrd(i.InputSimd128Register(0), i.InputOperand(2), i.InputInt8(1));
2095 }
2096 __ Movups(dst, i.InputSimd128Register(0));
2097 break;
2098 }
2099 case kX64Int32x4Add: {
2100 CpuFeatureScope sse_scope(masm(), SSE4_1);
2101 XMMRegister dst = i.OutputSimd128Register();
2102 __ addps(i.InputSimd128Register(0), i.InputSimd128Register(1));
2103 __ Movups(dst, i.InputSimd128Register(0));
2104 break;
2105 }
2106 case kX64Int32x4Sub: {
2107 CpuFeatureScope sse_scope(masm(), SSE4_1);
2108 XMMRegister dst = i.OutputSimd128Register();
2109 __ subps(i.InputSimd128Register(0), i.InputSimd128Register(1));
2110 __ Movups(dst, i.InputSimd128Register(0));
2111 break;
2112 }
2087 case kCheckedLoadInt8: 2113 case kCheckedLoadInt8:
2088 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl); 2114 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
2089 break; 2115 break;
2090 case kCheckedLoadUint8: 2116 case kCheckedLoadUint8:
2091 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl); 2117 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
2092 break; 2118 break;
2093 case kCheckedLoadInt16: 2119 case kCheckedLoadInt16:
2094 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl); 2120 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
2095 break; 2121 break;
2096 case kCheckedLoadUint16: 2122 case kCheckedLoadUint16:
(...skipping 618 matching lines...) Expand 10 before | Expand all | Expand 10 after
2715 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; 2741 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
2716 __ Nop(padding_size); 2742 __ Nop(padding_size);
2717 } 2743 }
2718 } 2744 }
2719 2745
2720 #undef __ 2746 #undef __
2721 2747
2722 } // namespace compiler 2748 } // namespace compiler
2723 } // namespace internal 2749 } // namespace internal
2724 } // namespace v8 2750 } // namespace v8
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