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Side by Side Diff: src/compiler/x64/code-generator-x64.cc

Issue 2385393002: [wasm] Implement I32x4ReplaceLane, I32x4Add, I32x4Sub. (Closed)
Patch Set: Add lanes as compile time constants Created 4 years ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include <limits> 7 #include <limits>
8 8
9 #include "src/compilation-info.h" 9 #include "src/compilation-info.h"
10 #include "src/compiler/code-generator-impl.h" 10 #include "src/compiler/code-generator-impl.h"
(...skipping 2129 matching lines...) Expand 10 before | Expand all | Expand 10 after
2140 XMMRegister dst = i.OutputSimd128Register(); 2140 XMMRegister dst = i.OutputSimd128Register();
2141 __ Movd(dst, i.InputRegister(0)); 2141 __ Movd(dst, i.InputRegister(0));
2142 __ shufps(dst, dst, 0x0); 2142 __ shufps(dst, dst, 0x0);
2143 break; 2143 break;
2144 } 2144 }
2145 case kX64Int32x4ExtractLane: { 2145 case kX64Int32x4ExtractLane: {
2146 CpuFeatureScope sse_scope(masm(), SSE4_1); 2146 CpuFeatureScope sse_scope(masm(), SSE4_1);
2147 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); 2147 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
2148 break; 2148 break;
2149 } 2149 }
2150 case kX64Int32x4ReplaceLane: {
2151 CpuFeatureScope sse_scope(masm(), SSE4_1);
2152 if (instr->InputAt(2)->IsRegister()) {
2153 __ Pinsrd(i.OutputSimd128Register(), i.InputRegister(2),
2154 i.InputInt8(1));
2155 } else {
2156 __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1));
2157 }
2158 break;
2159 }
2160 case kX64Int32x4Add: {
2161 CpuFeatureScope sse_scope(masm(), SSE4_1);
2162 __ paddd(i.OutputSimd128Register(), i.InputSimd128Register(1));
2163 break;
2164 }
2165 case kX64Int32x4Sub: {
2166 CpuFeatureScope sse_scope(masm(), SSE4_1);
2167 __ psubd(i.OutputSimd128Register(), i.InputSimd128Register(1));
2168 break;
2169 }
2150 case kCheckedLoadInt8: 2170 case kCheckedLoadInt8:
2151 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl); 2171 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
2152 break; 2172 break;
2153 case kCheckedLoadUint8: 2173 case kCheckedLoadUint8:
2154 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl); 2174 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
2155 break; 2175 break;
2156 case kCheckedLoadInt16: 2176 case kCheckedLoadInt16:
2157 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl); 2177 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
2158 break; 2178 break;
2159 case kCheckedLoadUint16: 2179 case kCheckedLoadUint16:
(...skipping 640 matching lines...) Expand 10 before | Expand all | Expand 10 after
2800 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; 2820 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
2801 __ Nop(padding_size); 2821 __ Nop(padding_size);
2802 } 2822 }
2803 } 2823 }
2804 2824
2805 #undef __ 2825 #undef __
2806 2826
2807 } // namespace compiler 2827 } // namespace compiler
2808 } // namespace internal 2828 } // namespace internal
2809 } // namespace v8 2829 } // namespace v8
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