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Side by Side Diff: src/compiler/x64/code-generator-x64.cc

Issue 2385393002: [wasm] Implement I32x4ReplaceLane, I32x4Add, I32x4Sub. (Closed)
Patch Set: Bill's review Created 4 years ago
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1 // Copyright 2013 the V8 project authors. All rights reserved. 1 // Copyright 2013 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/code-generator.h" 5 #include "src/compiler/code-generator.h"
6 6
7 #include <limits> 7 #include <limits>
8 8
9 #include "src/compilation-info.h" 9 #include "src/compilation-info.h"
10 #include "src/compiler/code-generator-impl.h" 10 #include "src/compiler/code-generator-impl.h"
(...skipping 2106 matching lines...) Expand 10 before | Expand all | Expand 10 after
2117 XMMRegister dst = i.OutputSimd128Register(); 2117 XMMRegister dst = i.OutputSimd128Register();
2118 __ Movd(dst, i.InputRegister(0)); 2118 __ Movd(dst, i.InputRegister(0));
2119 __ shufps(dst, dst, 0x0); 2119 __ shufps(dst, dst, 0x0);
2120 break; 2120 break;
2121 } 2121 }
2122 case kX64Int32x4ExtractLane: { 2122 case kX64Int32x4ExtractLane: {
2123 CpuFeatureScope sse_scope(masm(), SSE4_1); 2123 CpuFeatureScope sse_scope(masm(), SSE4_1);
2124 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1)); 2124 __ Pextrd(i.OutputRegister(), i.InputSimd128Register(0), i.InputInt8(1));
2125 break; 2125 break;
2126 } 2126 }
2127 case kX64Int32x4ReplaceLane: {
2128 CpuFeatureScope sse_scope(masm(), SSE4_1);
2129 if (instr->InputAt(2)->IsRegister()) {
2130 __ Pinsrd(i.OutputSimd128Register(), i.InputRegister(2),
2131 i.InputInt8(1));
2132 } else {
2133 __ Pinsrd(i.OutputSimd128Register(), i.InputOperand(2), i.InputInt8(1));
2134 }
2135 break;
2136 }
2137 case kX64Int32x4Add: {
2138 CpuFeatureScope sse_scope(masm(), SSE4_1);
2139 __ paddd(i.OutputSimd128Register(), i.InputSimd128Register(1));
2140 break;
2141 }
2142 case kX64Int32x4Sub: {
2143 CpuFeatureScope sse_scope(masm(), SSE4_1);
2144 __ psubd(i.OutputSimd128Register(), i.InputSimd128Register(1));
2145 break;
2146 }
2127 case kCheckedLoadInt8: 2147 case kCheckedLoadInt8:
2128 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl); 2148 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxbl);
2129 break; 2149 break;
2130 case kCheckedLoadUint8: 2150 case kCheckedLoadUint8:
2131 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl); 2151 ASSEMBLE_CHECKED_LOAD_INTEGER(movzxbl);
2132 break; 2152 break;
2133 case kCheckedLoadInt16: 2153 case kCheckedLoadInt16:
2134 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl); 2154 ASSEMBLE_CHECKED_LOAD_INTEGER(movsxwl);
2135 break; 2155 break;
2136 case kCheckedLoadUint16: 2156 case kCheckedLoadUint16:
(...skipping 640 matching lines...) Expand 10 before | Expand all | Expand 10 after
2777 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc; 2797 int padding_size = last_lazy_deopt_pc_ + space_needed - current_pc;
2778 __ Nop(padding_size); 2798 __ Nop(padding_size);
2779 } 2799 }
2780 } 2800 }
2781 2801
2782 #undef __ 2802 #undef __
2783 2803
2784 } // namespace compiler 2804 } // namespace compiler
2785 } // namespace internal 2805 } // namespace internal
2786 } // namespace v8 2806 } // namespace v8
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