| OLD | NEW |
| 1 /* | 1 /* |
| 2 * Copyright (C) 2011, Google Inc. All rights reserved. | 2 * Copyright (C) 2011, Google Inc. All rights reserved. |
| 3 * | 3 * |
| 4 * Redistribution and use in source and binary forms, with or without | 4 * Redistribution and use in source and binary forms, with or without |
| 5 * modification, are permitted provided that the following conditions | 5 * modification, are permitted provided that the following conditions |
| 6 * are met: | 6 * are met: |
| 7 * 1. Redistributions of source code must retain the above copyright | 7 * 1. Redistributions of source code must retain the above copyright |
| 8 * notice, this list of conditions and the following disclaimer. | 8 * notice, this list of conditions and the following disclaimer. |
| 9 * 2. Redistributions in binary form must reproduce the above copyright | 9 * 2. Redistributions in binary form must reproduce the above copyright |
| 10 * notice, this list of conditions and the following disclaimer in the | 10 * notice, this list of conditions and the following disclaimer in the |
| 11 * documentation and/or other materials provided with the distribution. | 11 * documentation and/or other materials provided with the distribution. |
| 12 * | 12 * |
| 13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS'' AND AN
Y | 13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. AND ITS CONTRIBUTORS ``AS IS'' AND |
| 14 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | 14 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 15 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| 16 * DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS BE LIABLE FOR AN
Y | 16 * ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR ITS CONTRIBUTORS BE LIABLE |
| 17 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | 17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| 18 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | 18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| 19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND O
N | 19 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| 20 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | 20 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
| 21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | 21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
| 22 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH |
| 23 * DAMAGE. |
| 23 */ | 24 */ |
| 24 | 25 |
| 25 #ifndef DenormalDisabler_h | 26 #ifndef DenormalDisabler_h |
| 26 #define DenormalDisabler_h | 27 #define DenormalDisabler_h |
| 27 | 28 |
| 28 #include "wtf/Allocator.h" | 29 #include "wtf/Allocator.h" |
| 29 #include "wtf/CPU.h" | 30 #include "wtf/CPU.h" |
| 30 #include "wtf/MathExtras.h" | 31 #include "wtf/MathExtras.h" |
| 31 #include <float.h> | 32 #include <float.h> |
| 32 | 33 |
| (...skipping 61 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
| 94 _controlfp_s(&unused, _DN_FLUSH, _MCW_DN); | 95 _controlfp_s(&unused, _DN_FLUSH, _MCW_DN); |
| 95 } | 96 } |
| 96 | 97 |
| 97 inline void restoreState() { | 98 inline void restoreState() { |
| 98 unsigned unused; | 99 unsigned unused; |
| 99 _controlfp_s(&unused, m_savedCSR, _MCW_DN); | 100 _controlfp_s(&unused, m_savedCSR, _MCW_DN); |
| 100 } | 101 } |
| 101 #elif CPU(ARM) || CPU(ARM64) | 102 #elif CPU(ARM) || CPU(ARM64) |
| 102 inline void disableDenormals() { | 103 inline void disableDenormals() { |
| 103 m_savedCSR = getStatusWord(); | 104 m_savedCSR = getStatusWord(); |
| 104 // Bit 24 is the flush-to-zero mode control bit. Setting it to 1 flushes den
ormals to 0. | 105 // Bit 24 is the flush-to-zero mode control bit. Setting it to 1 flushes |
| 106 // denormals to 0. |
| 105 setStatusWord(m_savedCSR | (1 << 24)); | 107 setStatusWord(m_savedCSR | (1 << 24)); |
| 106 } | 108 } |
| 107 | 109 |
| 108 inline void restoreState() { setStatusWord(m_savedCSR); } | 110 inline void restoreState() { setStatusWord(m_savedCSR); } |
| 109 | 111 |
| 110 inline int getStatusWord() { | 112 inline int getStatusWord() { |
| 111 int result; | 113 int result; |
| 112 #if CPU(ARM64) | 114 #if CPU(ARM64) |
| 113 asm volatile("mrs %x[result], FPCR" : [result] "=r"(result)); | 115 asm volatile("mrs %x[result], FPCR" : [result] "=r"(result)); |
| 114 #else | 116 #else |
| (...skipping 25 matching lines...) Expand all Loading... |
| 140 return (fabs(f) < FLT_MIN) ? 0.0f : f; | 142 return (fabs(f) < FLT_MIN) ? 0.0f : f; |
| 141 } | 143 } |
| 142 }; | 144 }; |
| 143 | 145 |
| 144 #endif | 146 #endif |
| 145 | 147 |
| 146 } // namespace blink | 148 } // namespace blink |
| 147 | 149 |
| 148 #undef HAVE_DENORMAL | 150 #undef HAVE_DENORMAL |
| 149 #endif // DenormalDisabler_h | 151 #endif // DenormalDisabler_h |
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