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1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
4 | 4 |
5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. | 5 #include "vm/globals.h" // Needed here to get TARGET_ARCH_ARM64. |
6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
7 | 7 |
8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
9 #include "vm/constants_arm64.h" | 9 #include "vm/constants_arm64.h" |
10 #include "vm/cpu.h" | 10 #include "vm/cpu.h" |
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326 object_pool_.ObjectAt(target_code_pool_index_)); | 326 object_pool_.ObjectAt(target_code_pool_index_)); |
327 } | 327 } |
328 | 328 |
329 | 329 |
330 void CallPattern::SetTargetCode(const Code& target) const { | 330 void CallPattern::SetTargetCode(const Code& target) const { |
331 object_pool_.SetObjectAt(target_code_pool_index_, target); | 331 object_pool_.SetObjectAt(target_code_pool_index_, target); |
332 // No need to flush the instruction cache, since the code is not modified. | 332 // No need to flush the instruction cache, since the code is not modified. |
333 } | 333 } |
334 | 334 |
335 | 335 |
| 336 void CallPattern::InsertDeoptCallAt(uword pc, uword target_address) { |
| 337 Instr* movz0 = Instr::At(pc + (0 * Instr::kInstrSize)); |
| 338 Instr* movk1 = Instr::At(pc + (1 * Instr::kInstrSize)); |
| 339 Instr* movk2 = Instr::At(pc + (2 * Instr::kInstrSize)); |
| 340 Instr* movk3 = Instr::At(pc + (3 * Instr::kInstrSize)); |
| 341 Instr* blr = Instr::At(pc + (4 * Instr::kInstrSize)); |
| 342 const uint32_t w0 = Utils::Low32Bits(target_address); |
| 343 const uint32_t w1 = Utils::High32Bits(target_address); |
| 344 const uint16_t h0 = Utils::Low16Bits(w0); |
| 345 const uint16_t h1 = Utils::High16Bits(w0); |
| 346 const uint16_t h2 = Utils::Low16Bits(w1); |
| 347 const uint16_t h3 = Utils::High16Bits(w1); |
| 348 |
| 349 movz0->SetMoveWideBits(MOVZ, IP0, h0, 0, kDoubleWord); |
| 350 movk1->SetMoveWideBits(MOVK, IP0, h1, 1, kDoubleWord); |
| 351 movk2->SetMoveWideBits(MOVK, IP0, h2, 2, kDoubleWord); |
| 352 movk3->SetMoveWideBits(MOVK, IP0, h3, 3, kDoubleWord); |
| 353 blr->SetUnconditionalBranchRegBits(BLR, IP0); |
| 354 |
| 355 ASSERT(kDeoptCallLengthInBytes == 5 * Instr::kInstrSize); |
| 356 CPU::FlushICache(pc, kDeoptCallLengthInBytes); |
| 357 } |
| 358 |
| 359 |
336 SwitchableCallPattern::SwitchableCallPattern(uword pc, const Code& code) | 360 SwitchableCallPattern::SwitchableCallPattern(uword pc, const Code& code) |
337 : object_pool_(ObjectPool::Handle(code.GetObjectPool())), | 361 : object_pool_(ObjectPool::Handle(code.GetObjectPool())), |
338 data_pool_index_(-1), | 362 data_pool_index_(-1), |
339 target_pool_index_(-1) { | 363 target_pool_index_(-1) { |
340 ASSERT(code.ContainsInstructionAt(pc)); | 364 ASSERT(code.ContainsInstructionAt(pc)); |
341 // Last instruction: blr ip0. | 365 // Last instruction: blr ip0. |
342 ASSERT(*(reinterpret_cast<uint32_t*>(pc) - 1) == 0xd63f0200); | 366 ASSERT(*(reinterpret_cast<uint32_t*>(pc) - 1) == 0xd63f0200); |
343 | 367 |
344 Register reg; | 368 Register reg; |
345 uword stub_load_end = | 369 uword stub_load_end = |
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385 bool ReturnPattern::IsValid() const { | 409 bool ReturnPattern::IsValid() const { |
386 Instr* bx_lr = Instr::At(pc_); | 410 Instr* bx_lr = Instr::At(pc_); |
387 const Register crn = ConcreteRegister(LR); | 411 const Register crn = ConcreteRegister(LR); |
388 const int32_t instruction = RET | (static_cast<int32_t>(crn) << kRnShift); | 412 const int32_t instruction = RET | (static_cast<int32_t>(crn) << kRnShift); |
389 return bx_lr->InstructionBits() == instruction; | 413 return bx_lr->InstructionBits() == instruction; |
390 } | 414 } |
391 | 415 |
392 } // namespace dart | 416 } // namespace dart |
393 | 417 |
394 #endif // defined TARGET_ARCH_ARM64 | 418 #endif // defined TARGET_ARCH_ARM64 |
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