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Side by Side Diff: src/full-codegen/arm/full-codegen-arm.cc

Issue 2381843002: Add Smi::Zero and replace all Smi::FromInt(0) calls (Closed)
Patch Set: Mark Smi::kZero as V8_EXPORT_PRIVATE Created 4 years, 2 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #if V8_TARGET_ARCH_ARM 5 #if V8_TARGET_ARCH_ARM
6 6
7 #include "src/full-codegen/full-codegen.h" 7 #include "src/full-codegen/full-codegen.h"
8 #include "src/ast/compile-time-value.h" 8 #include "src/ast/compile-time-value.h"
9 #include "src/ast/scopes.h" 9 #include "src/ast/scopes.h"
10 #include "src/code-factory.h" 10 #include "src/code-factory.h"
(...skipping 337 matching lines...) Expand 10 before | Expand all | Expand 10 after
348 { Comment cmnt(masm_, "[ return <undefined>;"); 348 { Comment cmnt(masm_, "[ return <undefined>;");
349 __ LoadRoot(r0, Heap::kUndefinedValueRootIndex); 349 __ LoadRoot(r0, Heap::kUndefinedValueRootIndex);
350 } 350 }
351 EmitReturnSequence(); 351 EmitReturnSequence();
352 352
353 // Force emit the constant pool, so it doesn't get emitted in the middle 353 // Force emit the constant pool, so it doesn't get emitted in the middle
354 // of the back edge table. 354 // of the back edge table.
355 masm()->CheckConstPool(true, false); 355 masm()->CheckConstPool(true, false);
356 } 356 }
357 357
358 358 void FullCodeGenerator::ClearAccumulator() { __ mov(r0, Operand(Smi::kZero)); }
359 void FullCodeGenerator::ClearAccumulator() {
360 __ mov(r0, Operand(Smi::FromInt(0)));
361 }
362
363 359
364 void FullCodeGenerator::EmitProfilingCounterDecrement(int delta) { 360 void FullCodeGenerator::EmitProfilingCounterDecrement(int delta) {
365 __ mov(r2, Operand(profiling_counter_)); 361 __ mov(r2, Operand(profiling_counter_));
366 __ ldr(r3, FieldMemOperand(r2, Cell::kValueOffset)); 362 __ ldr(r3, FieldMemOperand(r2, Cell::kValueOffset));
367 __ sub(r3, r3, Operand(Smi::FromInt(delta)), SetCC); 363 __ sub(r3, r3, Operand(Smi::FromInt(delta)), SetCC);
368 __ str(r3, FieldMemOperand(r2, Cell::kValueOffset)); 364 __ str(r3, FieldMemOperand(r2, Cell::kValueOffset));
369 } 365 }
370 366
371 367
372 #ifdef CAN_USE_ARMV7_INSTRUCTIONS 368 #ifdef CAN_USE_ARMV7_INSTRUCTIONS
(...skipping 675 matching lines...) Expand 10 before | Expand all | Expand 10 after
1048 __ ldr(r2, FieldMemOperand(r0, HeapObject::kMapOffset)); 1044 __ ldr(r2, FieldMemOperand(r0, HeapObject::kMapOffset));
1049 __ LoadRoot(ip, Heap::kMetaMapRootIndex); 1045 __ LoadRoot(ip, Heap::kMetaMapRootIndex);
1050 __ cmp(r2, ip); 1046 __ cmp(r2, ip);
1051 __ b(ne, &fixed_array); 1047 __ b(ne, &fixed_array);
1052 1048
1053 // We got a map in register r0. Get the enumeration cache from it. 1049 // We got a map in register r0. Get the enumeration cache from it.
1054 Label no_descriptors; 1050 Label no_descriptors;
1055 __ bind(&use_cache); 1051 __ bind(&use_cache);
1056 1052
1057 __ EnumLength(r1, r0); 1053 __ EnumLength(r1, r0);
1058 __ cmp(r1, Operand(Smi::FromInt(0))); 1054 __ cmp(r1, Operand(Smi::kZero));
1059 __ b(eq, &no_descriptors); 1055 __ b(eq, &no_descriptors);
1060 1056
1061 __ LoadInstanceDescriptors(r0, r2); 1057 __ LoadInstanceDescriptors(r0, r2);
1062 __ ldr(r2, FieldMemOperand(r2, DescriptorArray::kEnumCacheOffset)); 1058 __ ldr(r2, FieldMemOperand(r2, DescriptorArray::kEnumCacheOffset));
1063 __ ldr(r2, FieldMemOperand(r2, DescriptorArray::kEnumCacheBridgeCacheOffset)); 1059 __ ldr(r2, FieldMemOperand(r2, DescriptorArray::kEnumCacheBridgeCacheOffset));
1064 1060
1065 // Set up the four remaining stack slots. 1061 // Set up the four remaining stack slots.
1066 __ push(r0); // Map. 1062 __ push(r0); // Map.
1067 __ mov(r0, Operand(Smi::FromInt(0))); 1063 __ mov(r0, Operand(Smi::kZero));
1068 // Push enumeration cache, enumeration cache length (as smi) and zero. 1064 // Push enumeration cache, enumeration cache length (as smi) and zero.
1069 __ Push(r2, r1, r0); 1065 __ Push(r2, r1, r0);
1070 __ jmp(&loop); 1066 __ jmp(&loop);
1071 1067
1072 __ bind(&no_descriptors); 1068 __ bind(&no_descriptors);
1073 __ Drop(1); 1069 __ Drop(1);
1074 __ jmp(&exit); 1070 __ jmp(&exit);
1075 1071
1076 // We got a fixed array in register r0. Iterate through that. 1072 // We got a fixed array in register r0. Iterate through that.
1077 __ bind(&fixed_array); 1073 __ bind(&fixed_array);
1078 1074
1079 __ mov(r1, Operand(Smi::FromInt(1))); // Smi(1) indicates slow check 1075 __ mov(r1, Operand(Smi::FromInt(1))); // Smi(1) indicates slow check
1080 __ Push(r1, r0); // Smi and array 1076 __ Push(r1, r0); // Smi and array
1081 __ ldr(r1, FieldMemOperand(r0, FixedArray::kLengthOffset)); 1077 __ ldr(r1, FieldMemOperand(r0, FixedArray::kLengthOffset));
1082 __ Push(r1); // Fixed array length (as smi). 1078 __ Push(r1); // Fixed array length (as smi).
1083 PrepareForBailoutForId(stmt->PrepareId(), BailoutState::NO_REGISTERS); 1079 PrepareForBailoutForId(stmt->PrepareId(), BailoutState::NO_REGISTERS);
1084 __ mov(r0, Operand(Smi::FromInt(0))); 1080 __ mov(r0, Operand(Smi::kZero));
1085 __ Push(r0); // Initial index. 1081 __ Push(r0); // Initial index.
1086 1082
1087 // Generate code for doing the condition check. 1083 // Generate code for doing the condition check.
1088 __ bind(&loop); 1084 __ bind(&loop);
1089 SetExpressionAsStatementPosition(stmt->each()); 1085 SetExpressionAsStatementPosition(stmt->each());
1090 1086
1091 // Load the current count to r0, load the length to r1. 1087 // Load the current count to r0, load the length to r1.
1092 __ Ldrd(r0, r1, MemOperand(sp, 0 * kPointerSize)); 1088 __ Ldrd(r0, r1, MemOperand(sp, 0 * kPointerSize));
1093 __ cmp(r0, r1); // Compare to the array length. 1089 __ cmp(r0, r1); // Compare to the array length.
1094 __ b(hs, loop_statement.break_label()); 1090 __ b(hs, loop_statement.break_label());
(...skipping 825 matching lines...) Expand 10 before | Expand all | Expand 10 after
1920 case Token::MUL: { 1916 case Token::MUL: {
1921 __ SmiUntag(ip, right); 1917 __ SmiUntag(ip, right);
1922 __ smull(scratch1, scratch2, left, ip); 1918 __ smull(scratch1, scratch2, left, ip);
1923 __ mov(ip, Operand(scratch1, ASR, 31)); 1919 __ mov(ip, Operand(scratch1, ASR, 31));
1924 __ cmp(ip, Operand(scratch2)); 1920 __ cmp(ip, Operand(scratch2));
1925 __ b(ne, &stub_call); 1921 __ b(ne, &stub_call);
1926 __ cmp(scratch1, Operand::Zero()); 1922 __ cmp(scratch1, Operand::Zero());
1927 __ mov(right, Operand(scratch1), LeaveCC, ne); 1923 __ mov(right, Operand(scratch1), LeaveCC, ne);
1928 __ b(ne, &done); 1924 __ b(ne, &done);
1929 __ add(scratch2, right, Operand(left), SetCC); 1925 __ add(scratch2, right, Operand(left), SetCC);
1930 __ mov(right, Operand(Smi::FromInt(0)), LeaveCC, pl); 1926 __ mov(right, Operand(Smi::kZero), LeaveCC, pl);
1931 __ b(mi, &stub_call); 1927 __ b(mi, &stub_call);
1932 break; 1928 break;
1933 } 1929 }
1934 case Token::BIT_OR: 1930 case Token::BIT_OR:
1935 __ orr(right, left, Operand(right)); 1931 __ orr(right, left, Operand(right));
1936 break; 1932 break;
1937 case Token::BIT_AND: 1933 case Token::BIT_AND:
1938 __ and_(right, left, Operand(right)); 1934 __ and_(right, left, Operand(right));
1939 break; 1935 break;
1940 case Token::BIT_XOR: 1936 case Token::BIT_XOR:
(...skipping 1127 matching lines...) Expand 10 before | Expand all | Expand 10 after
3068 LhsKind assign_type = Property::GetAssignType(prop); 3064 LhsKind assign_type = Property::GetAssignType(prop);
3069 3065
3070 // Evaluate expression and get value. 3066 // Evaluate expression and get value.
3071 if (assign_type == VARIABLE) { 3067 if (assign_type == VARIABLE) {
3072 DCHECK(expr->expression()->AsVariableProxy()->var() != NULL); 3068 DCHECK(expr->expression()->AsVariableProxy()->var() != NULL);
3073 AccumulatorValueContext context(this); 3069 AccumulatorValueContext context(this);
3074 EmitVariableLoad(expr->expression()->AsVariableProxy()); 3070 EmitVariableLoad(expr->expression()->AsVariableProxy());
3075 } else { 3071 } else {
3076 // Reserve space for result of postfix operation. 3072 // Reserve space for result of postfix operation.
3077 if (expr->is_postfix() && !context()->IsEffect()) { 3073 if (expr->is_postfix() && !context()->IsEffect()) {
3078 __ mov(ip, Operand(Smi::FromInt(0))); 3074 __ mov(ip, Operand(Smi::kZero));
3079 PushOperand(ip); 3075 PushOperand(ip);
3080 } 3076 }
3081 switch (assign_type) { 3077 switch (assign_type) {
3082 case NAMED_PROPERTY: { 3078 case NAMED_PROPERTY: {
3083 // Put the object both on the stack and in the register. 3079 // Put the object both on the stack and in the register.
3084 VisitForStackValue(prop->obj()); 3080 VisitForStackValue(prop->obj());
3085 __ ldr(LoadDescriptor::ReceiverRegister(), MemOperand(sp, 0)); 3081 __ ldr(LoadDescriptor::ReceiverRegister(), MemOperand(sp, 0));
3086 EmitNamedPropertyLoad(prop); 3082 EmitNamedPropertyLoad(prop);
3087 break; 3083 break;
3088 } 3084 }
(...skipping 643 matching lines...) Expand 10 before | Expand all | Expand 10 after
3732 DCHECK(interrupt_address == 3728 DCHECK(interrupt_address ==
3733 isolate->builtins()->OnStackReplacement()->entry()); 3729 isolate->builtins()->OnStackReplacement()->entry());
3734 return ON_STACK_REPLACEMENT; 3730 return ON_STACK_REPLACEMENT;
3735 } 3731 }
3736 3732
3737 3733
3738 } // namespace internal 3734 } // namespace internal
3739 } // namespace v8 3735 } // namespace v8
3740 3736
3741 #endif // V8_TARGET_ARCH_ARM 3737 #endif // V8_TARGET_ARCH_ARM
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