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| 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file | 1 // Copyright (c) 2014, the Dart project authors. Please see the AUTHORS file |
| 2 // for details. All rights reserved. Use of this source code is governed by a | 2 // for details. All rights reserved. Use of this source code is governed by a |
| 3 // BSD-style license that can be found in the LICENSE file. | 3 // BSD-style license that can be found in the LICENSE file. |
| 4 | 4 |
| 5 #include "vm/globals.h" // NOLINT | 5 #include "vm/globals.h" // NOLINT |
| 6 #if defined(TARGET_ARCH_ARM64) | 6 #if defined(TARGET_ARCH_ARM64) |
| 7 | 7 |
| 8 #include "vm/assembler.h" | 8 #include "vm/assembler.h" |
| 9 #include "vm/cpu.h" | 9 #include "vm/cpu.h" |
| 10 #include "vm/longjump.h" | 10 #include "vm/longjump.h" |
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| 675 adds(dest, rn, op); | 675 adds(dest, rn, op); |
| 676 } else { | 676 } else { |
| 677 // TODO(zra): Try subtracting top 12 bits, then bottom 12 bits. | 677 // TODO(zra): Try subtracting top 12 bits, then bottom 12 bits. |
| 678 ASSERT(rn != TMP2); | 678 ASSERT(rn != TMP2); |
| 679 LoadImmediate(TMP2, imm); | 679 LoadImmediate(TMP2, imm); |
| 680 subs(dest, rn, Operand(TMP2)); | 680 subs(dest, rn, Operand(TMP2)); |
| 681 } | 681 } |
| 682 } | 682 } |
| 683 | 683 |
| 684 | 684 |
| 685 void Assembler::SubImmediate(Register dest, Register rn, int64_t imm) { | |
|
regis
2016/10/08 09:10:37
Same comment as for arm.
Vyacheslav Egorov (Google)
2016/10/24 20:23:03
Done.
| |
| 686 Operand op; | |
| 687 if (Operand::CanHold(imm, kXRegSizeInBits, &op) == Operand::Immediate) { | |
| 688 // Handles imm == kMinInt64. | |
| 689 sub(dest, rn, op); | |
| 690 } else if (Operand::CanHold(-imm, kXRegSizeInBits, &op) == | |
| 691 Operand::Immediate) { | |
| 692 ASSERT(imm != kMinInt64); // Would cause erroneous overflow detection. | |
| 693 add(dest, rn, op); | |
| 694 } else { | |
| 695 // TODO(zra): Try subtracting top 12 bits, then bottom 12 bits. | |
| 696 ASSERT(rn != TMP2); | |
| 697 LoadImmediate(TMP2, imm); | |
| 698 sub(dest, rn, Operand(TMP2)); | |
| 699 } | |
| 700 } | |
| 701 | |
| 702 | |
| 685 void Assembler::AndImmediate(Register rd, Register rn, int64_t imm) { | 703 void Assembler::AndImmediate(Register rd, Register rn, int64_t imm) { |
| 686 Operand imm_op; | 704 Operand imm_op; |
| 687 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) { | 705 if (Operand::IsImmLogical(imm, kXRegSizeInBits, &imm_op)) { |
| 688 andi(rd, rn, Immediate(imm)); | 706 andi(rd, rn, Immediate(imm)); |
| 689 } else { | 707 } else { |
| 690 LoadImmediate(TMP, imm); | 708 LoadImmediate(TMP, imm); |
| 691 and_(rd, rn, Operand(TMP)); | 709 and_(rd, rn, Operand(TMP)); |
| 692 } | 710 } |
| 693 } | 711 } |
| 694 | 712 |
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| 1470 add(base, array, Operand(index, LSL, shift)); | 1488 add(base, array, Operand(index, LSL, shift)); |
| 1471 } | 1489 } |
| 1472 const OperandSize size = Address::OperandSizeFor(cid); | 1490 const OperandSize size = Address::OperandSizeFor(cid); |
| 1473 ASSERT(Address::CanHoldOffset(offset, Address::Offset, size)); | 1491 ASSERT(Address::CanHoldOffset(offset, Address::Offset, size)); |
| 1474 return Address(base, offset, Address::Offset, size); | 1492 return Address(base, offset, Address::Offset, size); |
| 1475 } | 1493 } |
| 1476 | 1494 |
| 1477 } // namespace dart | 1495 } // namespace dart |
| 1478 | 1496 |
| 1479 #endif // defined TARGET_ARCH_ARM64 | 1497 #endif // defined TARGET_ARCH_ARM64 |
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