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Side by Side Diff: runtime/vm/assembler_arm.cc

Issue 2379733002: Recognize and optimize a.runtimeType == b.runtimeType pattern. (Closed)
Patch Set: port to all arch, make AOT opt non-speculative Created 4 years, 2 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" // NOLINT 5 #include "vm/globals.h" // NOLINT
6 #if defined(TARGET_ARCH_ARM) 6 #if defined(TARGET_ARCH_ARM)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/longjump.h" 10 #include "vm/longjump.h"
(...skipping 2999 matching lines...) Expand 10 before | Expand all | Expand 10 after
3010 mvn(IP, o, cond); 3010 mvn(IP, o, cond);
3011 adds(rd, rn, Operand(IP), cond); 3011 adds(rd, rn, Operand(IP), cond);
3012 } else { 3012 } else {
3013 LoadDecodableImmediate(IP, value, cond); 3013 LoadDecodableImmediate(IP, value, cond);
3014 subs(rd, rn, Operand(IP), cond); 3014 subs(rd, rn, Operand(IP), cond);
3015 } 3015 }
3016 } 3016 }
3017 } 3017 }
3018 3018
3019 3019
3020 void Assembler::SubImmediate(Register rd, Register rn, int32_t value,
3021 Condition cond) {
regis 2016/10/08 09:10:37 Why do you need this new flavor? Since you are not
Vyacheslav Egorov (Google) 2016/10/24 20:23:02 Done.
3022 Operand o;
3023 if (Operand::CanHold(value, &o)) {
3024 // Handles value == kMinInt32.
3025 sub(rd, rn, o, cond);
3026 } else if (Operand::CanHold(-value, &o)) {
3027 ASSERT(value != kMinInt32); // Would cause erroneous overflow detection.
3028 add(rd, rn, o, cond);
3029 } else {
3030 ASSERT(rn != IP);
3031 if (Operand::CanHold(~value, &o)) {
3032 mvn(IP, o, cond);
3033 sub(rd, rn, Operand(IP), cond);
3034 } else if (Operand::CanHold(~(-value), &o)) {
3035 ASSERT(value != kMinInt32); // Would cause erroneous overflow detection.
3036 mvn(IP, o, cond);
3037 add(rd, rn, Operand(IP), cond);
3038 } else {
3039 LoadDecodableImmediate(IP, value, cond);
3040 sub(rd, rn, Operand(IP), cond);
3041 }
3042 }
3043 }
3044
3045
3020 void Assembler::AndImmediate(Register rd, Register rs, int32_t imm, 3046 void Assembler::AndImmediate(Register rd, Register rs, int32_t imm,
3021 Condition cond) { 3047 Condition cond) {
3022 Operand o; 3048 Operand o;
3023 if (Operand::CanHold(imm, &o)) { 3049 if (Operand::CanHold(imm, &o)) {
3024 and_(rd, rs, Operand(o), cond); 3050 and_(rd, rs, Operand(o), cond);
3025 } else { 3051 } else {
3026 LoadImmediate(TMP, imm, cond); 3052 LoadImmediate(TMP, imm, cond);
3027 and_(rd, rs, Operand(TMP), cond); 3053 and_(rd, rs, Operand(TMP), cond);
3028 } 3054 }
3029 } 3055 }
(...skipping 518 matching lines...) Expand 10 before | Expand all | Expand 10 after
3548 3574
3549 3575
3550 const char* Assembler::FpuRegisterName(FpuRegister reg) { 3576 const char* Assembler::FpuRegisterName(FpuRegister reg) {
3551 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters)); 3577 ASSERT((0 <= reg) && (reg < kNumberOfFpuRegisters));
3552 return fpu_reg_names[reg]; 3578 return fpu_reg_names[reg];
3553 } 3579 }
3554 3580
3555 } // namespace dart 3581 } // namespace dart
3556 3582
3557 #endif // defined TARGET_ARCH_ARM 3583 #endif // defined TARGET_ARCH_ARM
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