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Side by Side Diff: src/IceAssemblerMIPS32.h

Issue 2377783002: Subzero, MIPS32: MOVZ instruction encoding (Closed)
Patch Set: Created 4 years, 2 months ago
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1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===// 1 //===- subzero/src/IceAssemblerMIPS32.h - Assembler for MIPS ----*- C++ -*-===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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182 void movf(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc); 182 void movf(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc);
183 183
184 void movn(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt); 184 void movn(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
185 185
186 void movn_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 186 void movn_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
187 187
188 void movn_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 188 void movn_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
189 189
190 void movt(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc); 190 void movt(const Operand *OpRd, const Operand *OpRs, const Operand *OpCc);
191 191
192 void movz(const Operand *OpRd, const Operand *OpRs, const Operand *OpRt);
193
192 void movz_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 194 void movz_d(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
193 195
194 void movz_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt); 196 void movz_s(const Operand *OpFd, const Operand *OpFs, const Operand *OpFt);
195 197
196 void mtc1(const Operand *OpRt, const Operand *OpFs); 198 void mtc1(const Operand *OpRt, const Operand *OpFs);
197 199
198 void mthi(const Operand *OpRs); 200 void mthi(const Operand *OpRs);
199 201
200 void mtlo(const Operand *OpRs); 202 void mtlo(const Operand *OpRs);
201 203
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337 void emitInst(IValueT Value) { 339 void emitInst(IValueT Value) {
338 AssemblerBuffer::EnsureCapacity _(&Buffer); 340 AssemblerBuffer::EnsureCapacity _(&Buffer);
339 Buffer.emit<IValueT>(Value); 341 Buffer.emit<IValueT>(Value);
340 } 342 }
341 }; 343 };
342 344
343 } // end of namespace MIPS32 345 } // end of namespace MIPS32
344 } // end of namespace Ice 346 } // end of namespace Ice
345 347
346 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H 348 #endif // SUBZERO_SRC_ICEASSEMBLERMIPS32_H
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