Subzero, MIPS32: DIVU instruction encoding

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 894 matching lines @@
 template <> void InstMIPS32Div_d::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->div_d(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Div_s::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->div_s(getDest(), getSrc(0), getSrc(1));
 }
 
+template <> void InstMIPS32Divu::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->divu(getDest(), getSrc(0));
+}
+
 template <> void InstMIPS32Lui::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *C32 = llvm::dyn_cast<ConstantInteger32>(getSrc(0));
   uint16_t Imm = static_cast<uint16_t>(C32->getValue());
   Asm->lui(getDest(), Imm);
 }
 
 template <> void InstMIPS32Lw::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   auto *Mem = llvm::dyn_cast<OperandMIPS32Mem>(getSrc(0));
@@ skipping 267 matching lines @@
   Asm->xor_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->xori(getDest(), getSrc(0), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice