Subzero, MIPS32: SRAV instruction encoding

src/IceInstMIPS32.cpp

 //===- subzero/src/IceInstMips32.cpp - Mips32 instruction implementation --===//
 //
 //                        The Subzero Code Generator
 //
 // This file is distributed under the University of Illinois Open Source
 // License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
 /// \file
@@ skipping 1121 matching lines @@
 template <> void InstMIPS32Sqrt_s::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->sqrt_s(getDest(), getSrc(0));
 }
 
 template <> void InstMIPS32Sra::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->sra(getDest(), getSrc(0), Imm);
 }
 
+template <> void InstMIPS32Srav::emitIAS(const Cfg *Func) const {
+  auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
+  Asm->srav(getDest(), getSrc(0), getSrc(1));
+}
+
 template <> void InstMIPS32Srl::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->srl(getDest(), getSrc(0), Imm);
 }
 
 template <> void InstMIPS32Srlv::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->srlv(getDest(), getSrc(0), getSrc(1));
 }
 
@@ skipping 50 matching lines @@
   Asm->xor_(getDest(), getSrc(0), getSrc(1));
 }
 
 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const {
   auto *Asm = Func->getAssembler<MIPS32::AssemblerMIPS32>();
   Asm->xori(getDest(), getSrc(0), Imm);
 }
 
 } // end of namespace MIPS32
 } // end of namespace Ice