MIPS32: Remove EXTRA, NORMAL instruction type check.

src/mips64/constants-mips64.h

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #ifndef  V8_MIPS_CONSTANTS_H_
 #define  V8_MIPS_CONSTANTS_H_
 
 #include "src/base/logging.h"
 #include "src/base/macros.h"
 #include "src/globals.h"
@@ skipping 914 matching lines @@
   // Read one particular bit out of the instruction bits.
   inline int Bit(int nr) const {
     return (InstructionBits() >> nr) & 1;
   }
 
   // Read a bit field out of the instruction bits.
   inline int Bits(int hi, int lo) const {
     return (InstructionBits() >> lo) & ((2U << (hi - lo)) - 1);
   }
 
-  enum TypeChecks { NORMAL, EXTRA };
-
   static constexpr uint64_t kOpcodeImmediateTypeMask =
       OpcodeToBitNumber(REGIMM) | OpcodeToBitNumber(BEQ) |
       OpcodeToBitNumber(BNE) | OpcodeToBitNumber(BLEZ) |
       OpcodeToBitNumber(BGTZ) | OpcodeToBitNumber(ADDI) |
       OpcodeToBitNumber(DADDI) | OpcodeToBitNumber(ADDIU) |
       OpcodeToBitNumber(DADDIU) | OpcodeToBitNumber(SLTI) |
       OpcodeToBitNumber(SLTIU) | OpcodeToBitNumber(ANDI) |
       OpcodeToBitNumber(ORI) | OpcodeToBitNumber(XORI) |
       OpcodeToBitNumber(LUI) | OpcodeToBitNumber(BEQL) |
       OpcodeToBitNumber(BNEL) | OpcodeToBitNumber(BLEZL) |
@@ skipping 60 matching lines @@
   }
 
   // Safe to call within InstructionType().
   inline int RsFieldRawNoAssert() const {
     return InstructionBits() & kRsFieldMask;
   }
 
   inline int SaFieldRaw() const { return InstructionBits() & kSaFieldMask; }
 
   // Get the encoding type of the instruction.
-  inline Type InstructionType(TypeChecks checks = NORMAL) const;
+  inline Type InstructionType() const;
 
  protected:
   InstructionBase() {}
 };
 
 template <class T>
 class InstructionGetters : public T {
  public:
   inline int RsValue() const {
     DCHECK(this->InstructionType() == InstructionBase::kRegisterType ||
@@ skipping 191 matching lines @@
 // C/C++ argument slots size.
 const int kCArgSlotCount = 0;
 
 // TODO(plind): below should be based on kPointerSize
 // TODO(plind): find all usages and remove the needless instructions for n64.
 const int kCArgsSlotsSize = kCArgSlotCount * Instruction::kInstrSize * 2;
 
 const int kInvalidStackOffset = -1;
 const int kBranchReturnOffset = 2 * Instruction::kInstrSize;
 
-InstructionBase::Type InstructionBase::InstructionType(
-    TypeChecks checks) const {
-  if (checks == EXTRA) {
-    if (OpcodeToBitNumber(OpcodeFieldRaw()) & kOpcodeImmediateTypeMask) {
-      return kImmediateType;
-    }
-  }
+InstructionBase::Type InstructionBase::InstructionType() const {
   switch (OpcodeFieldRaw()) {
     case SPECIAL:
-      if (checks == EXTRA) {
-        if (FunctionFieldToBitNumber(FunctionFieldRaw()) &
-            kFunctionFieldRegisterTypeMask) {
-          return kRegisterType;
-        } else {
-          return kUnsupported;
-        }
-      } else {
+      if (FunctionFieldToBitNumber(FunctionFieldRaw()) &
+          kFunctionFieldRegisterTypeMask) {
         return kRegisterType;
       }
-      break;
+      return kUnsupported;
     case SPECIAL2:
       switch (FunctionFieldRaw()) {
         case MUL:
         case CLZ:
         case DCLZ:
           return kRegisterType;
         default:
           return kUnsupported;
       }
       break;
@@ skipping 56 matching lines @@
       break;
     case COP1X:
       return kRegisterType;
 
     // 26 bits immediate type instructions. e.g.: j imm26.
     case J:
     case JAL:
       return kJumpType;
 
     default:
-      if (checks == NORMAL) {
-        return kImmediateType;
-      } else {
-        return kUnsupported;
-      }
+      return kImmediateType;
   }
   return kUnsupported;
 }
 #undef OpcodeToBitNumber
 #undef FunctionFieldToBitNumber
 
 // -----------------------------------------------------------------------------
 // Instructions.
 
 template <class P>
@@ skipping 100 matching lines @@
       }
       break;
     default:
       return false;
   }
 }
 }  // namespace internal
 }  // namespace v8
 
 #endif    // #ifndef V8_MIPS_CONSTANTS_H_