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Side by Side Diff: src/IceInstMIPS32.h

Issue 2369323002: [Subzero][MIPS] Implement 64-bit integer compare operations (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Reused existing tests in tests_lit/llvm2ice_tests/64bit.pnacl.ll instead of adding new tests in tes… Created 4 years, 2 months ago
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1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===// 1 //===- subzero/src/IceInstMIPS32.h - MIPS32 machine instrs --*- C++ -*-----===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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1146 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>; 1146 using InstMIPS32Mfc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mfc1>;
1147 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>; 1147 using InstMIPS32Mfhi = InstMIPS32UnaryopGPR<InstMIPS32::Mfhi>;
1148 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>; 1148 using InstMIPS32Mflo = InstMIPS32UnaryopGPR<InstMIPS32::Mflo>;
1149 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>; 1149 using InstMIPS32Mov_d = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_d>;
1150 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>; 1150 using InstMIPS32Mov_s = InstMIPS32TwoAddrFPR<InstMIPS32::Mov_s>;
1151 using InstMIPS32Movf = InstMIPS32MovConditional<InstMIPS32::Movf>; 1151 using InstMIPS32Movf = InstMIPS32MovConditional<InstMIPS32::Movf>;
1152 using InstMIPS32Movn = InstMIPS32MovConditional<InstMIPS32::Movn>; 1152 using InstMIPS32Movn = InstMIPS32MovConditional<InstMIPS32::Movn>;
1153 using InstMIPS32Movn_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_d>; 1153 using InstMIPS32Movn_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_d>;
1154 using InstMIPS32Movn_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_s>; 1154 using InstMIPS32Movn_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movn_s>;
1155 using InstMIPS32Movt = InstMIPS32MovConditional<InstMIPS32::Movt>; 1155 using InstMIPS32Movt = InstMIPS32MovConditional<InstMIPS32::Movt>;
1156 using InstMIPS32Movz = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz>; 1156 using InstMIPS32Movz = InstMIPS32MovConditional<InstMIPS32::Movz>;
1157 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>; 1157 using InstMIPS32Movz_d = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_d>;
1158 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>; 1158 using InstMIPS32Movz_s = InstMIPS32ThreeAddrGPR<InstMIPS32::Movz_s>;
1159 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>; 1159 using InstMIPS32Mtc1 = InstMIPS32TwoAddrGPR<InstMIPS32::Mtc1>;
1160 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>; 1160 using InstMIPS32Mthi = InstMIPS32UnaryopGPR<InstMIPS32::Mthi>;
1161 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>; 1161 using InstMIPS32Mtlo = InstMIPS32UnaryopGPR<InstMIPS32::Mtlo>;
1162 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>; 1162 using InstMIPS32Mul = InstMIPS32ThreeAddrGPR<InstMIPS32::Mul>;
1163 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>; 1163 using InstMIPS32Mul_d = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_d>;
1164 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>; 1164 using InstMIPS32Mul_s = InstMIPS32ThreeAddrFPR<InstMIPS32::Mul_s>;
1165 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>; 1165 using InstMIPS32Mult = InstMIPS32ThreeAddrGPR<InstMIPS32::Mult>;
1166 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>; 1166 using InstMIPS32Multu = InstMIPS32ThreeAddrGPR<InstMIPS32::Multu>;
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1321 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const; 1321 template <> void InstMIPS32Trunc_l_s::emitIAS(const Cfg *Func) const;
1322 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const; 1322 template <> void InstMIPS32Trunc_w_d::emitIAS(const Cfg *Func) const;
1323 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const; 1323 template <> void InstMIPS32Trunc_w_s::emitIAS(const Cfg *Func) const;
1324 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const; 1324 template <> void InstMIPS32Xor::emitIAS(const Cfg *Func) const;
1325 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const; 1325 template <> void InstMIPS32Xori::emitIAS(const Cfg *Func) const;
1326 1326
1327 } // end of namespace MIPS32 1327 } // end of namespace MIPS32
1328 } // end of namespace Ice 1328 } // end of namespace Ice
1329 1329
1330 #endif // SUBZERO_SRC_ICEINSTMIPS32_H 1330 #endif // SUBZERO_SRC_ICEINSTMIPS32_H
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