| Index: src/IceAssemblerMIPS32.cpp
|
| diff --git a/src/IceAssemblerMIPS32.cpp b/src/IceAssemblerMIPS32.cpp
|
| index aede16c0ecfd926b29929a272ec06ebc44aeb4d5..8d24e3523a5ee4d0d190e6dc2df2690cf0043f48 100644
|
| --- a/src/IceAssemblerMIPS32.cpp
|
| +++ b/src/IceAssemblerMIPS32.cpp
|
| @@ -521,6 +521,14 @@ void AssemblerMIPS32::div_s(const Operand *OpFd, const Operand *OpFs,
|
| emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "div.s");
|
| }
|
|
|
| +void AssemblerMIPS32::lui(const Operand *OpRt, const uint16_t Imm) {
|
| + IValueT Opcode = 0x3C000000;
|
| + const IValueT Rt = encodeGPRegister(OpRt, "Rt", "lui");
|
| + Opcode |= Rt << 16;
|
| + Opcode |= Imm;
|
| + emitInst(Opcode);
|
| +}
|
| +
|
| void AssemblerMIPS32::lw(const Operand *OpRt, const Operand *OpBase,
|
| const uint32_t Offset) {
|
| switch (OpRt->getType()) {
|
|
|