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Side by Side Diff: src/IceAssemblerMIPS32.cpp

Issue 2368343003: Subzero, MIPS32: Intrinsic call Bswap for i16, i32 and i64 (Closed)
Patch Set: Created 4 years, 2 months ago
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1 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===// 1 //===- subzero/src/IceAssemblerMIPS32.cpp - MIPS32 Assembler --------------===//
2 // 2 //
3 // The Subzero Code Generator 3 // The Subzero Code Generator
4 // 4 //
5 // This file is distributed under the University of Illinois Open Source 5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details. 6 // License. See LICENSE.TXT for details.
7 // 7 //
8 //===----------------------------------------------------------------------===// 8 //===----------------------------------------------------------------------===//
9 /// 9 ///
10 /// \file 10 /// \file
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514 static constexpr IValueT Opcode = 0x44000003; 514 static constexpr IValueT Opcode = 0x44000003;
515 emitCOP1FmtFtFsFd(Opcode, DoublePrecision, OpFd, OpFs, OpFt, "div.d"); 515 emitCOP1FmtFtFsFd(Opcode, DoublePrecision, OpFd, OpFs, OpFt, "div.d");
516 } 516 }
517 517
518 void AssemblerMIPS32::div_s(const Operand *OpFd, const Operand *OpFs, 518 void AssemblerMIPS32::div_s(const Operand *OpFd, const Operand *OpFs,
519 const Operand *OpFt) { 519 const Operand *OpFt) {
520 static constexpr IValueT Opcode = 0x44000003; 520 static constexpr IValueT Opcode = 0x44000003;
521 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "div.s"); 521 emitCOP1FmtFtFsFd(Opcode, SinglePrecision, OpFd, OpFs, OpFt, "div.s");
522 } 522 }
523 523
524 void AssemblerMIPS32::lui(const Operand *OpRt, const uint16_t Imm) {
525 IValueT Opcode = 0x3C000000;
526 const IValueT Rt = encodeGPRegister(OpRt, "Rt", "lui");
527 Opcode |= Rt << 16;
528 Opcode |= Imm;
529 emitInst(Opcode);
530 }
531
524 void AssemblerMIPS32::lw(const Operand *OpRt, const Operand *OpBase, 532 void AssemblerMIPS32::lw(const Operand *OpRt, const Operand *OpBase,
525 const uint32_t Offset) { 533 const uint32_t Offset) {
526 switch (OpRt->getType()) { 534 switch (OpRt->getType()) {
527 case IceType_i1: 535 case IceType_i1:
528 case IceType_i8: { 536 case IceType_i8: {
529 static constexpr IValueT Opcode = 0x80000000; 537 static constexpr IValueT Opcode = 0x80000000;
530 emitRtRsImm16(Opcode, OpRt, OpBase, Offset, "lb"); 538 emitRtRsImm16(Opcode, OpRt, OpBase, Offset, "lb");
531 break; 539 break;
532 } 540 }
533 case IceType_i16: { 541 case IceType_i16: {
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928 emitBr(Cond, OpRs, OpRtNone, Dest); 936 emitBr(Cond, OpRs, OpRtNone, Dest);
929 return; 937 return;
930 } 938 }
931 const IOffsetT Position = Buffer.size(); 939 const IOffsetT Position = Buffer.size();
932 emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition()); 940 emitBr(Cond, OpRs, OpRtNone, TargetLabel->getEncodedPosition());
933 TargetLabel->linkTo(*this, Position); 941 TargetLabel->linkTo(*this, Position);
934 } 942 }
935 943
936 } // end of namespace MIPS32 944 } // end of namespace MIPS32
937 } // end of namespace Ice 945 } // end of namespace Ice
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