Add MIPS SIMD Arch (MSA) optimized ARGBMirrorRow function

source/row_msa.cc

 /*
  *  Copyright 2016 The LibYuv Project Authors. All rights reserved.
  *
  *  Use of this source code is governed by a BSD-style license
  *  that can be found in the LICENSE file in the root of the source
  *  tree. An additional intellectual property rights grant can be found
  *  in the file PATENTS. All contributing project authors may
  *  be found in the AUTHORS file in the root of the source tree.
  */
 
@@ skipping 19 matching lines @@
 
   for (count = 0; count < width; count += 64) {
     LD_UB4(src, 16, src3, src2, src1, src0);
     VSHF_B2_UB(src3, src3, src2, src2, mask, mask, dst3, dst2);
     VSHF_B2_UB(src1, src1, src0, src0, mask, mask, dst1, dst0);
     ST_UB4(dst0, dst1, dst2, dst3, dst, 16);
     dst += 64;
     src -= 64;
   }
 }
+
+void ARGBMirrorRow_MSA(const uint8* src, uint8* dst, int width) {
+  int count;

[fbarchard1, 2016/09/26 18:04:34]

prefer int x for horizontal counts for consistency with row_common.cc

for (x = 0; x < width; x += 2) {

+  v16u8 src0, src1, src2, src3;
+  v16u8 dst0, dst1, dst2, dst3;
+  v4i32 mask = { 3, 2, 1, 0 };
+
+  src += width * 4 - 64;
+
+  for (count = 0; count < width; count += 16) {
+    LD_UB4(src, 16, src3, src2, src1, src0);
+    VSHF_W4_UB(src0, src0, src1, src1, src2, src2, src3, src3,

[fbarchard1, 2016/09/26 18:04:34]

consider less unrolling.  (measure performance)

For this function on other CPUs just 1 or 2 shuffles is enough to achieve most
of the performance without excessive unrolling which hurts performance on odd
widths.
Rule of thumb is do 2 shuffles
LD_UB2
VSHF_W2_UB
ST_UB2

8 pixels at a time, 32 bytes.

+               mask, mask, mask, mask, dst0, dst1, dst2, dst3);
+    ST_UB4(dst0, dst1, dst2, dst3, dst, 16);
+    dst += 64;
+    src -= 64;
+  }
+}
 #endif  // !defined(LIBYUV_DISABLE_MSA) && defined(__mips_msa)
 
 #ifdef __cplusplus
 }  // extern "C"
 }  // namespace libyuv
 #endif