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Side by Side Diff: src/compiler/instruction-selector.cc

Issue 2367413002: [turbofan] Introduces the BitcastWordToTaggedSigned and BitcastTaggedToWord opcodes. (Closed)
Patch Set: Update. Created 4 years, 2 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/compiler/instruction-selector.h" 5 #include "src/compiler/instruction-selector.h"
6 6
7 #include <limits> 7 #include <limits>
8 8
9 #include "src/base/adapters.h" 9 #include "src/base/adapters.h"
10 #include "src/compiler/instruction-selector-impl.h" 10 #include "src/compiler/instruction-selector-impl.h"
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1097 case IrOpcode::kInt64LessThanOrEqual: 1097 case IrOpcode::kInt64LessThanOrEqual:
1098 return VisitInt64LessThanOrEqual(node); 1098 return VisitInt64LessThanOrEqual(node);
1099 case IrOpcode::kUint64Div: 1099 case IrOpcode::kUint64Div:
1100 return MarkAsWord64(node), VisitUint64Div(node); 1100 return MarkAsWord64(node), VisitUint64Div(node);
1101 case IrOpcode::kUint64LessThan: 1101 case IrOpcode::kUint64LessThan:
1102 return VisitUint64LessThan(node); 1102 return VisitUint64LessThan(node);
1103 case IrOpcode::kUint64LessThanOrEqual: 1103 case IrOpcode::kUint64LessThanOrEqual:
1104 return VisitUint64LessThanOrEqual(node); 1104 return VisitUint64LessThanOrEqual(node);
1105 case IrOpcode::kUint64Mod: 1105 case IrOpcode::kUint64Mod:
1106 return MarkAsWord64(node), VisitUint64Mod(node); 1106 return MarkAsWord64(node), VisitUint64Mod(node);
1107 case IrOpcode::kBitcastTaggedToWord:
1108 return MarkAsRepresentation(MachineType::PointerRepresentation(), node),
1109 VisitBitcastTaggedToWord(node);
1107 case IrOpcode::kBitcastWordToTagged: 1110 case IrOpcode::kBitcastWordToTagged:
1108 return MarkAsReference(node), VisitBitcastWordToTagged(node); 1111 return MarkAsReference(node), VisitBitcastWordToTagged(node);
1112 case IrOpcode::kBitcastWordToTaggedSigned:
1113 return MarkAsRepresentation(MachineRepresentation::kTaggedSigned, node),
1114 EmitIdentity(node);
1109 case IrOpcode::kChangeFloat32ToFloat64: 1115 case IrOpcode::kChangeFloat32ToFloat64:
1110 return MarkAsFloat64(node), VisitChangeFloat32ToFloat64(node); 1116 return MarkAsFloat64(node), VisitChangeFloat32ToFloat64(node);
1111 case IrOpcode::kChangeInt32ToFloat64: 1117 case IrOpcode::kChangeInt32ToFloat64:
1112 return MarkAsFloat64(node), VisitChangeInt32ToFloat64(node); 1118 return MarkAsFloat64(node), VisitChangeInt32ToFloat64(node);
1113 case IrOpcode::kChangeUint32ToFloat64: 1119 case IrOpcode::kChangeUint32ToFloat64:
1114 return MarkAsFloat64(node), VisitChangeUint32ToFloat64(node); 1120 return MarkAsFloat64(node), VisitChangeUint32ToFloat64(node);
1115 case IrOpcode::kChangeFloat64ToInt32: 1121 case IrOpcode::kChangeFloat64ToInt32:
1116 return MarkAsWord32(node), VisitChangeFloat64ToInt32(node); 1122 return MarkAsWord32(node), VisitChangeFloat64ToInt32(node);
1117 case IrOpcode::kChangeFloat64ToUint32: 1123 case IrOpcode::kChangeFloat64ToUint32:
1118 return MarkAsWord32(node), VisitChangeFloat64ToUint32(node); 1124 return MarkAsWord32(node), VisitChangeFloat64ToUint32(node);
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1494 1500
1495 void InstructionSelector::VisitStackSlot(Node* node) { 1501 void InstructionSelector::VisitStackSlot(Node* node) {
1496 int size = 1 << ElementSizeLog2Of(StackSlotRepresentationOf(node->op())); 1502 int size = 1 << ElementSizeLog2Of(StackSlotRepresentationOf(node->op()));
1497 int slot = frame_->AllocateSpillSlot(size); 1503 int slot = frame_->AllocateSpillSlot(size);
1498 OperandGenerator g(this); 1504 OperandGenerator g(this);
1499 1505
1500 Emit(kArchStackSlot, g.DefineAsRegister(node), 1506 Emit(kArchStackSlot, g.DefineAsRegister(node),
1501 sequence()->AddImmediate(Constant(slot)), 0, nullptr); 1507 sequence()->AddImmediate(Constant(slot)), 0, nullptr);
1502 } 1508 }
1503 1509
1510 void InstructionSelector::VisitBitcastTaggedToWord(Node* node) {
1511 OperandGenerator g(this);
1512 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(node->InputAt(0)));
1513 }
1514
1504 void InstructionSelector::VisitBitcastWordToTagged(Node* node) { 1515 void InstructionSelector::VisitBitcastWordToTagged(Node* node) {
1505 OperandGenerator g(this); 1516 OperandGenerator g(this);
1506 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(node->InputAt(0))); 1517 Emit(kArchNop, g.DefineSameAsFirst(node), g.Use(node->InputAt(0)));
1507 } 1518 }
1508 1519
1509 // 32 bit targets do not implement the following instructions. 1520 // 32 bit targets do not implement the following instructions.
1510 #if V8_TARGET_ARCH_32_BIT 1521 #if V8_TARGET_ARCH_32_BIT
1511 1522
1512 void InstructionSelector::VisitWord64And(Node* node) { UNIMPLEMENTED(); } 1523 void InstructionSelector::VisitWord64And(Node* node) { UNIMPLEMENTED(); }
1513 1524
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2084 return new (instruction_zone()) FrameStateDescriptor( 2095 return new (instruction_zone()) FrameStateDescriptor(
2085 instruction_zone(), state_info.type(), state_info.bailout_id(), 2096 instruction_zone(), state_info.type(), state_info.bailout_id(),
2086 state_info.state_combine(), parameters, locals, stack, 2097 state_info.state_combine(), parameters, locals, stack,
2087 state_info.shared_info(), outer_state); 2098 state_info.shared_info(), outer_state);
2088 } 2099 }
2089 2100
2090 2101
2091 } // namespace compiler 2102 } // namespace compiler
2092 } // namespace internal 2103 } // namespace internal
2093 } // namespace v8 2104 } // namespace v8
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