Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(32)

Unified Diff: src/IceTargetLoweringMIPS32.cpp

Issue 2364143002: Subzero, MIPS32: lowerSelect for i64 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressing review comments Created 4 years, 3 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« no previous file with comments | « no previous file | tests_lit/llvm2ice_tests/64bit.pnacl.ll » ('j') | no next file with comments »
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/IceTargetLoweringMIPS32.cpp
diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
index fd2fa2eca0254935a6be3c520f7751f2acc03cf1..a6d9da81e5e86650c4b6362366409a6a6724ffe6 100644
--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -3445,14 +3445,29 @@ void TargetMIPS32::lowerSelect(const InstSelect *Instr) {
Variable *Dest = Instr->getDest();
const Type DestTy = Dest->getType();
- if (DestTy == IceType_i64 || isVectorType(DestTy)) {
+ if (isVectorType(DestTy)) {
UnimplementedLoweringError(this, Instr);
return;
}
- Variable *DestR = legalizeToReg(Dest);
- Variable *SrcTR = legalizeToReg(Instr->getTrueOperand());
- Variable *SrcFR = legalizeToReg(Instr->getFalseOperand());
+ Variable *DestR = nullptr;
+ Variable *DestHiR = nullptr;
+ Variable *SrcTR = nullptr;
+ Variable *SrcTHiR = nullptr;
+ Variable *SrcFR = nullptr;
+ Variable *SrcFHiR = nullptr;
+
+ if (DestTy == IceType_i64) {
+ DestR = llvm::cast<Variable>(loOperand(Dest));
+ DestHiR = llvm::cast<Variable>(hiOperand(Dest));
+ SrcTR = legalizeToReg(loOperand(Instr->getTrueOperand()));
+ SrcTHiR = legalizeToReg(hiOperand(Instr->getTrueOperand()));
+ SrcFR = legalizeToReg(loOperand(Instr->getFalseOperand()));
+ SrcFHiR = legalizeToReg(hiOperand(Instr->getFalseOperand()));
+ } else {
+ SrcTR = legalizeToReg(Instr->getTrueOperand());
+ SrcFR = legalizeToReg(Instr->getFalseOperand());
+ }
Variable *ConditionR = legalizeToReg(Instr->getCondition());
@@ -3464,18 +3479,21 @@ void TargetMIPS32::lowerSelect(const InstSelect *Instr) {
case IceType_i16:
case IceType_i32:
_movn(SrcFR, SrcTR, ConditionR);
+ _mov(Dest, SrcFR);
+ break;
+ case IceType_i64:
+ _movn(SrcFR, SrcTR, ConditionR);
+ _movn(SrcFHiR, SrcTHiR, ConditionR);
_mov(DestR, SrcFR);
- _mov(Dest, DestR);
+ _mov(DestHiR, SrcFHiR);
break;
case IceType_f32:
_movn_s(SrcFR, SrcTR, ConditionR);
- _mov(DestR, SrcFR);
- _mov(Dest, DestR);
+ _mov(Dest, SrcFR);
break;
case IceType_f64:
_movn_d(SrcFR, SrcTR, ConditionR);
- _mov(DestR, SrcFR);
- _mov(Dest, DestR);
+ _mov(Dest, SrcFR);
break;
default:
UnimplementedLoweringError(this, Instr);
« no previous file with comments | « no previous file | tests_lit/llvm2ice_tests/64bit.pnacl.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698