Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(233)

Side by Side Diff: tests_lit/llvm2ice_tests/fp.cmp.ll

Issue 2364143002: Subzero, MIPS32: lowerSelect for i64 (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Addressing review comments Created 4 years, 2 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View unified diff | Download patch
« no previous file with comments | « tests_lit/llvm2ice_tests/64bit.pnacl.ll ('k') | tests_lit/llvm2ice_tests/select-opt.ll » ('j') | no next file with comments »
Toggle Intra-line Diffs ('i') | Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
OLDNEW
1 ; This tries to be a comprehensive test of f32 and f64 compare operations. 1 ; This tries to be a comprehensive test of f32 and f64 compare operations.
2 2
3 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \ 3 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 \
4 ; RUN: -allow-externally-defined-symbols | FileCheck %s 4 ; RUN: -allow-externally-defined-symbols | FileCheck %s
5 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 \ 5 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 \
6 ; RUN: -allow-externally-defined-symbols | FileCheck %s \ 6 ; RUN: -allow-externally-defined-symbols | FileCheck %s \
7 ; RUN: --check-prefix=CHECK-OM1 7 ; RUN: --check-prefix=CHECK-OM1
8 8
9 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \ 9 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \
10 ; RUN: --target arm32 -i %s --args -O2 \ 10 ; RUN: --target arm32 -i %s --args -O2 \
(...skipping 992 matching lines...) Expand 10 before | Expand all | Expand 10 after
1003 ; CHECK: ucomiss 1003 ; CHECK: ucomiss
1004 ; CHECK: ja 1004 ; CHECK: ja
1005 ; CHECK: movss 1005 ; CHECK: movss
1006 ; ARM32-LABEL: selectFloatVarVar 1006 ; ARM32-LABEL: selectFloatVarVar
1007 ; ARM32: vcmp.f32 1007 ; ARM32: vcmp.f32
1008 ; ARM32-OM1: vmovne.f32 s{{[0-9]+}} 1008 ; ARM32-OM1: vmovne.f32 s{{[0-9]+}}
1009 ; ARM32-O2: vmovmi.f32 s{{[0-9]+}} 1009 ; ARM32-O2: vmovmi.f32 s{{[0-9]+}}
1010 ; ARM32: bx 1010 ; ARM32: bx
1011 ; MIPS32-LABEL: selectFloatVarVar 1011 ; MIPS32-LABEL: selectFloatVarVar
1012 ; MIPS32: movn.s {{.*}} 1012 ; MIPS32: movn.s {{.*}}
1013 ; MIPS32: mov.s {{.*}}
1014 1013
1015 define internal double @selectDoubleVarVar(double %a, double %b) { 1014 define internal double @selectDoubleVarVar(double %a, double %b) {
1016 entry: 1015 entry:
1017 %cmp = fcmp olt double %a, %b 1016 %cmp = fcmp olt double %a, %b
1018 %cond = select i1 %cmp, double %a, double %b 1017 %cond = select i1 %cmp, double %a, double %b
1019 ret double %cond 1018 ret double %cond
1020 } 1019 }
1021 ; CHECK-LABEL: selectDoubleVarVar 1020 ; CHECK-LABEL: selectDoubleVarVar
1022 ; CHECK: movsd 1021 ; CHECK: movsd
1023 ; CHECK: ucomisd 1022 ; CHECK: ucomisd
1024 ; CHECK: ja 1023 ; CHECK: ja
1025 ; CHECK: movsd 1024 ; CHECK: movsd
1026 ; ARM32-LABEL: selectDoubleVarVar 1025 ; ARM32-LABEL: selectDoubleVarVar
1027 ; ARM32: vcmp.f64 1026 ; ARM32: vcmp.f64
1028 ; ARM32-OM1: vmovne.f64 d{{[0-9]+}} 1027 ; ARM32-OM1: vmovne.f64 d{{[0-9]+}}
1029 ; ARM32-O2: vmovmi.f64 d{{[0-9]+}} 1028 ; ARM32-O2: vmovmi.f64 d{{[0-9]+}}
1030 ; ARM32: bx 1029 ; ARM32: bx
1031 ; MIPS32-LABEL: selectDoubleVarVar 1030 ; MIPS32-LABEL: selectDoubleVarVar
1032 ; MIPS32: movn.d {{.*}} 1031 ; MIPS32: movn.d {{.*}}
1033 ; MIPS32: mov.d {{.*}}
OLDNEW
« no previous file with comments | « tests_lit/llvm2ice_tests/64bit.pnacl.ll ('k') | tests_lit/llvm2ice_tests/select-opt.ll » ('j') | no next file with comments »

Powered by Google App Engine
This is Rietveld 408576698