Subzero, MIPS32: lowerSelect for i64

tests_lit/llvm2ice_tests/select-opt.ll

 ; Simple test of the select instruction.  The CHECK lines are only
 ; checking for basic instruction patterns that should be present
 ; regardless of the optimization level, so there are no special OPTM1
 ; match lines.
 
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -O2 -allow-externally-defined-symbols \
 ; RUN:   | %if --need=target_X8632 --command FileCheck %s
 ; RUN: %if --need=target_X8632 --command %p2i --filetype=obj --disassemble \
 ; RUN:   --target x8632 -i %s --args -Om1 -allow-externally-defined-symbols \
@@ skipping 90 matching lines @@
 define internal i64 @testSelectImm64(i64 %a, i64 %b) {
 entry:
   %cond = select i1 true, i64 %a, i64 %b
   ret i64 %cond
 }
 ; CHECK-LABEL: testSelectImm64
 ; CHECK-NOT: cmp 0x{{[0-9a-f]+}},
 ; ARM32-LABEL: testSelectImm64
 ; ARM32-NOT: cmp #{{.*}},
 ; MIPS32-LABEL: testSelectImm64
+; MIPS32: movn
+; MIPS32: movn
+; MIPS32: move

[Jim Stichnoth, 2016/09/24 14:39:59]

I think you should probably remove these two 'move' checks.

"make check-lit" is failing on this test with -Om1.

The reason is that the Om1 register allocator spills the results to the stack
and then reloads from the stack into the return-value registers.  It does this
with sw/lw instructions, and not 'move' instructions.

So my next question is, why aren't all the other 'move' checks in this file
hitting the same problem?  I think it's because the other lowering sequences
compute the result into a temporary infinite-weight variable (register) and then
copy that into the result variable, whereas the i64 select lowering computes
(via movn) into a register pair and then moves directly into dest (via either sw
or move).

For example, the existing i32 select lowering:

  case IceType_i32:
    _movn(SrcFR, SrcTR, ConditionR);
    _mov(DestR, SrcFR);
    _mov(Dest, DestR);
    break;

could probably be changed to:

  case IceType_i32:
    _movn(SrcFR, SrcTR, ConditionR);
    _mov(Dest, SrcFR);
    break;

and it should still be correct but would generate "movn; sw" in Om1 mode rather
than "movn; move".

[obucinac, 2016/09/25 17:19:42]

Done.

+; MIPS32: move