OLD | NEW |
1 ; This tries to be a comprehensive test of f32 and f64 convert operations. | 1 ; This tries to be a comprehensive test of f32 and f64 convert operations. |
2 ; The CHECK lines are only checking for basic instruction patterns | 2 ; The CHECK lines are only checking for basic instruction patterns |
3 ; that should be present regardless of the optimization level, so | 3 ; that should be present regardless of the optimization level, so |
4 ; there are no special OPTM1 match lines. | 4 ; there are no special OPTM1 match lines. |
5 | 5 |
6 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s | 6 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -O2 | FileCheck %s |
7 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s | 7 ; RUN: %p2i --filetype=obj --disassemble -i %s --args -Om1 | FileCheck %s |
8 | 8 |
9 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \ | 9 ; RUN: %if --need=allow_dump --need=target_ARM32 --command %p2i --filetype=asm \ |
10 ; RUN: --target arm32 -i %s --args -O2 --skip-unimplemented \ | 10 ; RUN: --target arm32 -i %s --args -O2 --skip-unimplemented \ |
(...skipping 104 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
115 define internal i32 @doubleToSigned32(double %a) { | 115 define internal i32 @doubleToSigned32(double %a) { |
116 entry: | 116 entry: |
117 %conv = fptosi double %a to i32 | 117 %conv = fptosi double %a to i32 |
118 ret i32 %conv | 118 ret i32 %conv |
119 } | 119 } |
120 ; CHECK-LABEL: doubleToSigned32 | 120 ; CHECK-LABEL: doubleToSigned32 |
121 ; CHECK: cvttsd2si | 121 ; CHECK: cvttsd2si |
122 ; ARM32-LABEL: doubleToSigned32 | 122 ; ARM32-LABEL: doubleToSigned32 |
123 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} | 123 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} |
124 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 124 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
| 125 ; MIPS32-LABEL: doubleToSigned32 |
| 126 ; MIPS32: trunc.w.d |
| 127 ; MIPS32O2-LABEL: doubleToSigned32 |
| 128 ; MIPS32O2: trunc.w.d |
125 | 129 |
126 define internal i32 @doubleToSigned32Const() { | 130 define internal i32 @doubleToSigned32Const() { |
127 entry: | 131 entry: |
128 %conv = fptosi double 867.5309 to i32 | 132 %conv = fptosi double 867.5309 to i32 |
129 ret i32 %conv | 133 ret i32 %conv |
130 } | 134 } |
131 ; CHECK-LABEL: doubleToSigned32Const | 135 ; CHECK-LABEL: doubleToSigned32Const |
132 ; CHECK: cvttsd2si | 136 ; CHECK: cvttsd2si |
133 ; ARM32-LABEL: doubleToSigned32Const | 137 ; ARM32-LABEL: doubleToSigned32Const |
134 ; ARM32-DAG: movw [[ADDR:r[0-9]+]], #:lower16:.L$ | 138 ; ARM32-DAG: movw [[ADDR:r[0-9]+]], #:lower16:.L$ |
135 ; ARM32-DAG: movt [[ADDR]], #:upper16:.L$ | 139 ; ARM32-DAG: movt [[ADDR]], #:upper16:.L$ |
136 ; ARM32-DAG: vldr [[DREG:d[0-9]+]], {{\[}}[[ADDR]]{{\]}} | 140 ; ARM32-DAG: vldr [[DREG:d[0-9]+]], {{\[}}[[ADDR]]{{\]}} |
137 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]+]], [[DREG]] | 141 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]+]], [[DREG]] |
138 ; ARM32-DAF: vmov {{r[0-9]+}}, [[REG]] | 142 ; ARM32-DAF: vmov {{r[0-9]+}}, [[REG]] |
| 143 ; MIPS32-LABEL: doubleToSigned32Const |
| 144 ; MIPS32: lui |
| 145 ; MIPS32: ldc1 |
| 146 ; MIPS32: trunc.w.d |
| 147 ; MIPS32O2-LABEL: doubleToSigned32Const |
| 148 ; MIPS32O2: lui |
| 149 ; MIPS32O2: ldc1 |
| 150 ; MIPS32O2: trunc.w.d |
139 | 151 |
140 define internal i32 @floatToSigned32(float %a) { | 152 define internal i32 @floatToSigned32(float %a) { |
141 entry: | 153 entry: |
142 %conv = fptosi float %a to i32 | 154 %conv = fptosi float %a to i32 |
143 ret i32 %conv | 155 ret i32 %conv |
144 } | 156 } |
145 ; CHECK-LABEL: floatToSigned32 | 157 ; CHECK-LABEL: floatToSigned32 |
146 ; CHECK: cvttss2si | 158 ; CHECK: cvttss2si |
147 ; ARM32-LABEL: floatToSigned32 | 159 ; ARM32-LABEL: floatToSigned32 |
148 ; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]+]], {{s[0-9]+}} | 160 ; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]+]], {{s[0-9]+}} |
149 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 161 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
150 ; MIPS32-LABEL: floatToSigned32 | 162 ; MIPS32-LABEL: floatToSigned32 |
151 ; MIPS32: trunc.w.s $f{{.*}}, $f{{.*}} | 163 ; MIPS32: trunc.w.s $f{{.*}}, $f{{.*}} |
152 ; MIPS32O2-LABEL: floatToSigned32 | 164 ; MIPS32O2-LABEL: floatToSigned32 |
153 ; MIPS32O2: trunc.w.s $[[REG:f[0-9]+]], $f{{.*}} | 165 ; MIPS32O2: trunc.w.s $[[REG:f[0-9]+]], $f{{.*}} |
154 ; MIPS32O2: mfc1 $v0, $[[REG]] | 166 ; MIPS32O2: mfc1 $v0, $[[REG]] |
155 | 167 |
156 define internal i32 @doubleToUnsigned32(double %a) { | 168 define internal i32 @doubleToUnsigned32(double %a) { |
157 entry: | 169 entry: |
158 %conv = fptoui double %a to i32 | 170 %conv = fptoui double %a to i32 |
159 ret i32 %conv | 171 ret i32 %conv |
160 } | 172 } |
161 ; CHECK-LABEL: doubleToUnsigned32 | 173 ; CHECK-LABEL: doubleToUnsigned32 |
162 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f64_i32 | 174 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f64_i32 |
163 ; ARM32-LABEL: doubleToUnsigned32 | 175 ; ARM32-LABEL: doubleToUnsigned32 |
164 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]+]], {{d[0-9]+}} | 176 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]+]], {{d[0-9]+}} |
165 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 177 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
| 178 ; MIPS32-LABEL: doubleToUnsigned32 |
| 179 ; MIPS32: jal __Sz_fptoui_f64_i32 |
| 180 ; MIPS32O2-LABEL: doubleToUnsigned32 |
| 181 ; MIPS32O2: jal __Sz_fptoui_f64_i32 |
166 | 182 |
167 define internal i32 @floatToUnsigned32(float %a) { | 183 define internal i32 @floatToUnsigned32(float %a) { |
168 entry: | 184 entry: |
169 %conv = fptoui float %a to i32 | 185 %conv = fptoui float %a to i32 |
170 ret i32 %conv | 186 ret i32 %conv |
171 } | 187 } |
172 ; CHECK-LABEL: floatToUnsigned32 | 188 ; CHECK-LABEL: floatToUnsigned32 |
173 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f32_i32 | 189 ; CHECK: call {{.*}} R_{{.*}} __Sz_fptoui_f32_i32 |
174 ; ARM32-LABEL: floatToUnsigned32 | 190 ; ARM32-LABEL: floatToUnsigned32 |
175 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]+]], {{s[0-9]+}} | 191 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]+]], {{s[0-9]+}} |
176 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 192 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
| 193 ; MIPS32-LABEL: floatToUnsigned32 |
| 194 ; MIPS32: jal __Sz_fptoui_f32_i32 |
| 195 ; MIPS32O2-LABEL: floatToUnsigned32 |
| 196 ; MIPS32O2: jal __Sz_fptoui_f32_i32 |
177 | 197 |
178 define internal i32 @doubleToSigned16(double %a) { | 198 define internal i32 @doubleToSigned16(double %a) { |
179 entry: | 199 entry: |
180 %conv = fptosi double %a to i16 | 200 %conv = fptosi double %a to i16 |
181 %conv.ret_ext = sext i16 %conv to i32 | 201 %conv.ret_ext = sext i16 %conv to i32 |
182 ret i32 %conv.ret_ext | 202 ret i32 %conv.ret_ext |
183 } | 203 } |
184 ; CHECK-LABEL: doubleToSigned16 | 204 ; CHECK-LABEL: doubleToSigned16 |
185 ; CHECK: cvttsd2si | 205 ; CHECK: cvttsd2si |
186 ; CHECK: movsx | 206 ; CHECK: movsx |
187 ; ARM32-LABEL: doubleToSigned16 | 207 ; ARM32-LABEL: doubleToSigned16 |
188 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} | 208 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} |
189 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 209 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
190 ; ARM32: sxth | 210 ; ARM32: sxth |
| 211 ; MIPS32-LABEL: doubleToSigned16 |
| 212 ; MIPS32: trunc.w.d |
| 213 ; MIPS32O2-LABEL: doubleToSigned16 |
| 214 ; MIPS32O2: trunc.w.d |
191 | 215 |
192 define internal i32 @floatToSigned16(float %a) { | 216 define internal i32 @floatToSigned16(float %a) { |
193 entry: | 217 entry: |
194 %conv = fptosi float %a to i16 | 218 %conv = fptosi float %a to i16 |
195 %conv.ret_ext = sext i16 %conv to i32 | 219 %conv.ret_ext = sext i16 %conv to i32 |
196 ret i32 %conv.ret_ext | 220 ret i32 %conv.ret_ext |
197 } | 221 } |
198 ; CHECK-LABEL: floatToSigned16 | 222 ; CHECK-LABEL: floatToSigned16 |
199 ; CHECK: cvttss2si | 223 ; CHECK: cvttss2si |
200 ; CHECK: movsx | 224 ; CHECK: movsx |
201 ; ARM32-LABEL: floatToSigned16 | 225 ; ARM32-LABEL: floatToSigned16 |
202 ; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} | 226 ; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} |
203 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 227 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
204 ; ARM32: sxth | 228 ; ARM32: sxth |
| 229 ; MIPS32-LABEL: floatToSigned16 |
| 230 ; MIPS32: trunc.w.s |
| 231 ; MIPS32O2-LABEL: floatToSigned16 |
| 232 ; MIPS32O2: trunc.w.s |
205 | 233 |
206 define internal i32 @doubleToUnsigned16(double %a) { | 234 define internal i32 @doubleToUnsigned16(double %a) { |
207 entry: | 235 entry: |
208 %conv = fptoui double %a to i16 | 236 %conv = fptoui double %a to i16 |
209 %conv.ret_ext = zext i16 %conv to i32 | 237 %conv.ret_ext = zext i16 %conv to i32 |
210 ret i32 %conv.ret_ext | 238 ret i32 %conv.ret_ext |
211 } | 239 } |
212 ; CHECK-LABEL: doubleToUnsigned16 | 240 ; CHECK-LABEL: doubleToUnsigned16 |
213 ; CHECK: cvttsd2si | 241 ; CHECK: cvttsd2si |
214 ; CHECK: movzx | 242 ; CHECK: movzx |
215 ; ARM32-LABEL: doubleToUnsigned16 | 243 ; ARM32-LABEL: doubleToUnsigned16 |
216 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} | 244 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} |
217 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 245 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
218 ; ARM32: uxth | 246 ; ARM32: uxth |
| 247 ; MIPS32-LABEL: doubleToUnsigned16 |
| 248 ; MIPS32: trunc.w.d |
| 249 ; MIPS32O2-LABEL: doubleToUnsigned16 |
| 250 ; MIPS32O2: trunc.w.d |
219 | 251 |
220 define internal i32 @floatToUnsigned16(float %a) { | 252 define internal i32 @floatToUnsigned16(float %a) { |
221 entry: | 253 entry: |
222 %conv = fptoui float %a to i16 | 254 %conv = fptoui float %a to i16 |
223 %conv.ret_ext = zext i16 %conv to i32 | 255 %conv.ret_ext = zext i16 %conv to i32 |
224 ret i32 %conv.ret_ext | 256 ret i32 %conv.ret_ext |
225 } | 257 } |
226 ; CHECK-LABEL: floatToUnsigned16 | 258 ; CHECK-LABEL: floatToUnsigned16 |
227 ; CHECK: cvttss2si | 259 ; CHECK: cvttss2si |
228 ; CHECK: movzx | 260 ; CHECK: movzx |
229 ; ARM32-LABEL: floatToUnsigned16 | 261 ; ARM32-LABEL: floatToUnsigned16 |
230 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} | 262 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} |
231 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 263 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
232 ; ARM32: uxth | 264 ; ARM32: uxth |
| 265 ; MIPS32-LABEL: floatToUnsigned16 |
| 266 ; MIPS32: trunc.w.s |
| 267 ; MIPS32O2-LABEL: floatToUnsigned16 |
| 268 ; MIPS32O2: trunc.w.s |
233 | 269 |
234 define internal i32 @doubleToSigned8(double %a) { | 270 define internal i32 @doubleToSigned8(double %a) { |
235 entry: | 271 entry: |
236 %conv = fptosi double %a to i8 | 272 %conv = fptosi double %a to i8 |
237 %conv.ret_ext = sext i8 %conv to i32 | 273 %conv.ret_ext = sext i8 %conv to i32 |
238 ret i32 %conv.ret_ext | 274 ret i32 %conv.ret_ext |
239 } | 275 } |
240 ; CHECK-LABEL: doubleToSigned8 | 276 ; CHECK-LABEL: doubleToSigned8 |
241 ; CHECK: cvttsd2si | 277 ; CHECK: cvttsd2si |
242 ; CHECK: movsx | 278 ; CHECK: movsx |
243 ; ARM32-LABEL: doubleToSigned8 | 279 ; ARM32-LABEL: doubleToSigned8 |
244 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} | 280 ; ARM32-DAG: vcvt.s32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} |
245 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 281 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
246 ; ARM32: sxtb | 282 ; ARM32: sxtb |
| 283 ; MIPS32-LABEL: doubleToSigned8 |
| 284 ; MIPS32: trunc.w.d |
| 285 ; MIPS32O2-LABEL: doubleToSigned8 |
| 286 ; MIPS32O2: trunc.w.d |
247 | 287 |
248 define internal i32 @floatToSigned8(float %a) { | 288 define internal i32 @floatToSigned8(float %a) { |
249 entry: | 289 entry: |
250 %conv = fptosi float %a to i8 | 290 %conv = fptosi float %a to i8 |
251 %conv.ret_ext = sext i8 %conv to i32 | 291 %conv.ret_ext = sext i8 %conv to i32 |
252 ret i32 %conv.ret_ext | 292 ret i32 %conv.ret_ext |
253 } | 293 } |
254 ; CHECK-LABEL: floatToSigned8 | 294 ; CHECK-LABEL: floatToSigned8 |
255 ; CHECK: cvttss2si | 295 ; CHECK: cvttss2si |
256 ; CHECK: movsx | 296 ; CHECK: movsx |
257 ; ARM32-LABEL: floatToSigned8 | 297 ; ARM32-LABEL: floatToSigned8 |
258 ; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} | 298 ; ARM32-DAG: vcvt.s32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} |
259 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 299 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
260 ; ARM32: sxtb | 300 ; ARM32: sxtb |
| 301 ; MIPS32-LABEL: floatToSigned8 |
| 302 ; MIPS32: trunc.w.s |
| 303 ; MIPS32O2-LABEL: floatToSigned8 |
| 304 ; MIPS32O2: trunc.w.s |
261 | 305 |
262 define internal i32 @doubleToUnsigned8(double %a) { | 306 define internal i32 @doubleToUnsigned8(double %a) { |
263 entry: | 307 entry: |
264 %conv = fptoui double %a to i8 | 308 %conv = fptoui double %a to i8 |
265 %conv.ret_ext = zext i8 %conv to i32 | 309 %conv.ret_ext = zext i8 %conv to i32 |
266 ret i32 %conv.ret_ext | 310 ret i32 %conv.ret_ext |
267 } | 311 } |
268 ; CHECK-LABEL: doubleToUnsigned8 | 312 ; CHECK-LABEL: doubleToUnsigned8 |
269 ; CHECK: cvttsd2si | 313 ; CHECK: cvttsd2si |
270 ; CHECK: movzx | 314 ; CHECK: movzx |
271 ; ARM32-LABEL: doubleToUnsigned8 | 315 ; ARM32-LABEL: doubleToUnsigned8 |
272 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} | 316 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} |
273 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 317 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
274 ; ARM32: uxtb | 318 ; ARM32: uxtb |
| 319 ; MIPS32-LABEL: doubleToUnsigned8 |
| 320 ; MIPS32: trunc.w.d |
| 321 ; MIPS32O2-LABEL: doubleToUnsigned8 |
| 322 ; MIPS32O2: trunc.w.d |
275 | 323 |
276 define internal i32 @floatToUnsigned8(float %a) { | 324 define internal i32 @floatToUnsigned8(float %a) { |
277 entry: | 325 entry: |
278 %conv = fptoui float %a to i8 | 326 %conv = fptoui float %a to i8 |
279 %conv.ret_ext = zext i8 %conv to i32 | 327 %conv.ret_ext = zext i8 %conv to i32 |
280 ret i32 %conv.ret_ext | 328 ret i32 %conv.ret_ext |
281 } | 329 } |
282 ; CHECK-LABEL: floatToUnsigned8 | 330 ; CHECK-LABEL: floatToUnsigned8 |
283 ; CHECK: cvttss2si | 331 ; CHECK: cvttss2si |
284 ; CHECK: movzx | 332 ; CHECK: movzx |
285 ; ARM32-LABEL: floatToUnsigned8 | 333 ; ARM32-LABEL: floatToUnsigned8 |
286 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} | 334 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} |
287 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] | 335 ; ARM32-DAG: vmov {{r[0-9]+}}, [[REG]] |
288 ; ARM32: uxtb | 336 ; ARM32: uxtb |
| 337 ; MIPS32-LABEL: floatToUnsigned8 |
| 338 ; MIPS32: trunc.w.s |
| 339 ; MIPS32O2-LABEL: floatToUnsigned8 |
| 340 ; MIPS32O2: trunc.w.s |
289 | 341 |
290 define internal i32 @doubleToUnsigned1(double %a) { | 342 define internal i32 @doubleToUnsigned1(double %a) { |
291 entry: | 343 entry: |
292 %tobool = fptoui double %a to i1 | 344 %tobool = fptoui double %a to i1 |
293 %tobool.ret_ext = zext i1 %tobool to i32 | 345 %tobool.ret_ext = zext i1 %tobool to i32 |
294 ret i32 %tobool.ret_ext | 346 ret i32 %tobool.ret_ext |
295 } | 347 } |
296 ; CHECK-LABEL: doubleToUnsigned1 | 348 ; CHECK-LABEL: doubleToUnsigned1 |
297 ; CHECK: cvttsd2si | 349 ; CHECK: cvttsd2si |
298 ; CHECK-NOT: and eax,0x1 | 350 ; CHECK-NOT: and eax,0x1 |
299 ; ARM32-LABEL: doubleToUnsigned1 | 351 ; ARM32-LABEL: doubleToUnsigned1 |
300 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} | 352 ; ARM32-DAG: vcvt.u32.f64 [[REG:s[0-9]*]], {{d[0-9]*}} |
301 ; ARM32-DAG: vmov [[RES:r[0-9]+]], [[REG]] | 353 ; ARM32-DAG: vmov [[RES:r[0-9]+]], [[REG]] |
302 ; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1 | 354 ; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1 |
303 ; ARM32-NOT: uxth | 355 ; ARM32-NOT: uxth |
304 ; ARM32-NOT: uxtb | 356 ; ARM32-NOT: uxtb |
| 357 ; MIPS32-LABEL: doubleToUnsigned1 |
| 358 ; MIPS32: trunc.w.d |
| 359 ; MIPS32O2-LABEL: doubleToUnsigned1 |
| 360 ; MIPS32O2: trunc.w.d |
305 | 361 |
306 define internal i32 @floatToUnsigned1(float %a) { | 362 define internal i32 @floatToUnsigned1(float %a) { |
307 entry: | 363 entry: |
308 %tobool = fptoui float %a to i1 | 364 %tobool = fptoui float %a to i1 |
309 %tobool.ret_ext = zext i1 %tobool to i32 | 365 %tobool.ret_ext = zext i1 %tobool to i32 |
310 ret i32 %tobool.ret_ext | 366 ret i32 %tobool.ret_ext |
311 } | 367 } |
312 ; CHECK-LABEL: floatToUnsigned1 | 368 ; CHECK-LABEL: floatToUnsigned1 |
313 ; CHECK: cvttss2si | 369 ; CHECK: cvttss2si |
314 ; CHECK-NOT: and eax,0x1 | 370 ; CHECK-NOT: and eax,0x1 |
315 ; ARM32-LABEL: floatToUnsigned1 | 371 ; ARM32-LABEL: floatToUnsigned1 |
316 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} | 372 ; ARM32-DAG: vcvt.u32.f32 [[REG:s[0-9]*]], {{s[0-9]*}} |
317 ; ARM32-DAG: vmov [[RES:r[0-9]+]], [[REG]] | 373 ; ARM32-DAG: vmov [[RES:r[0-9]+]], [[REG]] |
318 ; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1 | 374 ; ARM32-DAG: and {{r[0-9]+}}, [[RES]], #1 |
319 ; ARM32-NOT: uxth | 375 ; ARM32-NOT: uxth |
320 ; ARM32-NOT: uxtb | 376 ; ARM32-NOT: uxtb |
| 377 ; MIPS32-LABEL: floatToUnsigned1 |
| 378 ; MIPS32: trunc.w.s |
| 379 ; MIPS32O2-LABEL: floatToUnsigned1 |
| 380 ; MIPS32O2: trunc.w.s |
321 | 381 |
322 define internal double @signed64ToDouble(i64 %a) { | 382 define internal double @signed64ToDouble(i64 %a) { |
323 entry: | 383 entry: |
324 %conv = sitofp i64 %a to double | 384 %conv = sitofp i64 %a to double |
325 ret double %conv | 385 ret double %conv |
326 } | 386 } |
327 ; CHECK-LABEL: signed64ToDouble | 387 ; CHECK-LABEL: signed64ToDouble |
328 ; CHECK: call {{.*}} R_{{.*}} __Sz_sitofp_i64_f64 | 388 ; CHECK: call {{.*}} R_{{.*}} __Sz_sitofp_i64_f64 |
329 ; CHECK: fstp QWORD | 389 ; CHECK: fstp QWORD |
330 ; ARM32-LABEL: signed64ToDouble | 390 ; ARM32-LABEL: signed64ToDouble |
331 ; TODO(jpp): implement this test. | 391 ; TODO(jpp): implement this test. |
| 392 ; MIPS32-LABEL: signed64ToDouble |
| 393 ; MIPS32: jal __Sz_sitofp_i64_f64 |
| 394 ; MIPS32O2-LABEL: signed64ToDouble |
| 395 ; MIPS32O2: jal __Sz_sitofp_i64_f64 |
332 | 396 |
333 define internal float @signed64ToFloat(i64 %a) { | 397 define internal float @signed64ToFloat(i64 %a) { |
334 entry: | 398 entry: |
335 %conv = sitofp i64 %a to float | 399 %conv = sitofp i64 %a to float |
336 ret float %conv | 400 ret float %conv |
337 } | 401 } |
338 ; CHECK-LABEL: signed64ToFloat | 402 ; CHECK-LABEL: signed64ToFloat |
339 ; CHECK: call {{.*}} R_{{.*}} __Sz_sitofp_i64_f32 | 403 ; CHECK: call {{.*}} R_{{.*}} __Sz_sitofp_i64_f32 |
340 ; CHECK: fstp DWORD | 404 ; CHECK: fstp DWORD |
341 ; ARM32-LABEL: signed64ToFloat | 405 ; ARM32-LABEL: signed64ToFloat |
342 ; TODO(jpp): implement this test. | 406 ; TODO(jpp): implement this test. |
| 407 ; MIPS32-LABEL: signed64ToFloat |
| 408 ; MIPS32: jal __Sz_sitofp_i64_f32 |
| 409 ; MIPS32O2-LABEL: signed64ToFloat |
| 410 ; MIPS32O2: jal __Sz_sitofp_i64_f32 |
343 | 411 |
344 define internal double @unsigned64ToDouble(i64 %a) { | 412 define internal double @unsigned64ToDouble(i64 %a) { |
345 entry: | 413 entry: |
346 %conv = uitofp i64 %a to double | 414 %conv = uitofp i64 %a to double |
347 ret double %conv | 415 ret double %conv |
348 } | 416 } |
349 ; CHECK-LABEL: unsigned64ToDouble | 417 ; CHECK-LABEL: unsigned64ToDouble |
350 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f64 | 418 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f64 |
351 ; CHECK: fstp | 419 ; CHECK: fstp |
352 ; ARM32-LABEL: unsigned64ToDouble | 420 ; ARM32-LABEL: unsigned64ToDouble |
353 ; TODO(jpp): implement this test. | 421 ; TODO(jpp): implement this test. |
| 422 ; MIPS32-LABEL: unsigned64ToDouble |
| 423 ; MIPS32: jal __Sz_uitofp_i64_f64 |
| 424 ; MIPS32O2-LABEL: unsigned64ToDouble |
| 425 ; MIPS32O2: jal __Sz_uitofp_i64_f64 |
354 | 426 |
355 define internal float @unsigned64ToFloat(i64 %a) { | 427 define internal float @unsigned64ToFloat(i64 %a) { |
356 entry: | 428 entry: |
357 %conv = uitofp i64 %a to float | 429 %conv = uitofp i64 %a to float |
358 ret float %conv | 430 ret float %conv |
359 } | 431 } |
360 ; CHECK-LABEL: unsigned64ToFloat | 432 ; CHECK-LABEL: unsigned64ToFloat |
361 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f32 | 433 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f32 |
362 ; CHECK: fstp | 434 ; CHECK: fstp |
363 ; ARM32-LABEL: unsigned64ToFloat | 435 ; ARM32-LABEL: unsigned64ToFloat |
364 ; TODO(jpp): implement this test. | 436 ; TODO(jpp): implement this test. |
| 437 ; MIPS32-LABEL: unsigned64ToFloat |
| 438 ; MIPS32: jal __Sz_uitofp_i64_f32 |
| 439 ; MIPS32O2-LABEL: unsigned64ToFloat |
| 440 ; MIPS32O2: jal __Sz_uitofp_i64_f32 |
365 | 441 |
366 define internal double @unsigned64ToDoubleConst() { | 442 define internal double @unsigned64ToDoubleConst() { |
367 entry: | 443 entry: |
368 %conv = uitofp i64 12345678901234 to double | 444 %conv = uitofp i64 12345678901234 to double |
369 ret double %conv | 445 ret double %conv |
370 } | 446 } |
371 ; CHECK-LABEL: unsigned64ToDoubleConst | 447 ; CHECK-LABEL: unsigned64ToDoubleConst |
372 ; CHECK: mov DWORD PTR [esp+0x4],0xb3a | 448 ; CHECK: mov DWORD PTR [esp+0x4],0xb3a |
373 ; CHECK: mov DWORD PTR [esp],0x73ce2ff2 | 449 ; CHECK: mov DWORD PTR [esp],0x73ce2ff2 |
374 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f64 | 450 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i64_f64 |
375 ; CHECK: fstp | 451 ; CHECK: fstp |
376 ; ARM32-LABEL: unsigned64ToDoubleConst | 452 ; ARM32-LABEL: unsigned64ToDoubleConst |
377 ; TODO(jpp): implement this test. | 453 ; TODO(jpp): implement this test. |
| 454 ; MIPS32-LABEL: unsigned64ToDoubleConst |
| 455 ; MIPS32: jal __Sz_uitofp_i64_f64 |
| 456 ; MIPS32O2-LABEL: unsigned64ToDoubleConst |
| 457 ; MIPS32O2: jal __Sz_uitofp_i64_f64 |
378 | 458 |
379 define internal double @signed32ToDouble(i32 %a) { | 459 define internal double @signed32ToDouble(i32 %a) { |
380 entry: | 460 entry: |
381 %conv = sitofp i32 %a to double | 461 %conv = sitofp i32 %a to double |
382 ret double %conv | 462 ret double %conv |
383 } | 463 } |
384 ; CHECK-LABEL: signed32ToDouble | 464 ; CHECK-LABEL: signed32ToDouble |
385 ; CHECK: cvtsi2sd | 465 ; CHECK: cvtsi2sd |
386 ; CHECK: fld | 466 ; CHECK: fld |
387 ; ARM32-LABEL: signed32ToDouble | 467 ; ARM32-LABEL: signed32ToDouble |
388 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} | 468 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} |
389 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] | 469 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] |
| 470 ; MIPS32-LABEL: signed32ToDouble |
| 471 ; MIPS32: cvt.d.w |
| 472 ; MIPS32O2-LABEL: signed32ToDouble |
| 473 ; MIPS32O2: cvt.d.w |
390 | 474 |
391 define internal double @signed32ToDoubleConst() { | 475 define internal double @signed32ToDoubleConst() { |
392 entry: | 476 entry: |
393 %conv = sitofp i32 123 to double | 477 %conv = sitofp i32 123 to double |
394 ret double %conv | 478 ret double %conv |
395 } | 479 } |
396 ; CHECK-LABEL: signed32ToDoubleConst | 480 ; CHECK-LABEL: signed32ToDoubleConst |
397 ; CHECK: cvtsi2sd {{.*[^1]}} | 481 ; CHECK: cvtsi2sd {{.*[^1]}} |
398 ; CHECK: fld | 482 ; CHECK: fld |
399 ; ARM32-LABEL: signed32ToDoubleConst | 483 ; ARM32-LABEL: signed32ToDoubleConst |
400 ; ARM32-DAG: mov [[CONST:r[0-9]+]], #123 | 484 ; ARM32-DAG: mov [[CONST:r[0-9]+]], #123 |
401 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[CONST]] | 485 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[CONST]] |
402 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] | 486 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] |
| 487 ; MIPS32-LABEL: signed32ToDoubleConst |
| 488 ; MIPS32: cvt.d.w |
| 489 ; MIPS32O2-LABEL: signed32ToDoubleConst |
| 490 ; MIPS32O2: cvt.d.w |
403 | 491 |
404 define internal float @signed32ToFloat(i32 %a) { | 492 define internal float @signed32ToFloat(i32 %a) { |
405 entry: | 493 entry: |
406 %conv = sitofp i32 %a to float | 494 %conv = sitofp i32 %a to float |
407 ret float %conv | 495 ret float %conv |
408 } | 496 } |
409 ; CHECK-LABEL: signed32ToFloat | 497 ; CHECK-LABEL: signed32ToFloat |
410 ; CHECK: cvtsi2ss | 498 ; CHECK: cvtsi2ss |
411 ; CHECK: fld | 499 ; CHECK: fld |
412 ; ARM32-LABEL: signed32ToFloat | 500 ; ARM32-LABEL: signed32ToFloat |
413 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} | 501 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} |
414 ; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]] | 502 ; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]] |
415 ; MIPS32-LABEL: signed32ToFloat | 503 ; MIPS32-LABEL: signed32ToFloat |
416 ; MIPS32: cvt.s.w $f{{.*}}, $f{{.*}} | 504 ; MIPS32: cvt.s.w $f{{.*}}, $f{{.*}} |
417 ; MIPS32O2-LABEL: signed32ToFloat | 505 ; MIPS32O2-LABEL: signed32ToFloat |
418 ; MIPS32O2: mtc1 $a0, $[[REG:f[0-9]+]] | 506 ; MIPS32O2: mtc1 $a0, $[[REG:f[0-9]+]] |
419 ; MIPS32O2: cvt.s.w $f{{.*}}, $[[REG]] | 507 ; MIPS32O2: cvt.s.w $f{{.*}}, $[[REG]] |
420 | 508 |
421 define internal double @unsigned32ToDouble(i32 %a) { | 509 define internal double @unsigned32ToDouble(i32 %a) { |
422 entry: | 510 entry: |
423 %conv = uitofp i32 %a to double | 511 %conv = uitofp i32 %a to double |
424 ret double %conv | 512 ret double %conv |
425 } | 513 } |
426 ; CHECK-LABEL: unsigned32ToDouble | 514 ; CHECK-LABEL: unsigned32ToDouble |
427 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i32_f64 | 515 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i32_f64 |
428 ; CHECK: fstp QWORD | 516 ; CHECK: fstp QWORD |
429 ; ARM32-LABEL: unsigned32ToDouble | 517 ; ARM32-LABEL: unsigned32ToDouble |
430 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} | 518 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} |
431 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] | 519 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] |
| 520 ; MIPS32-LABEL: unsigned32ToDouble |
| 521 ; MIPS32: jal __Sz_uitofp_i32_f64 |
| 522 ; MIPS32O2-LABEL: unsigned32ToDouble |
| 523 ; MIPS32O2: jal __Sz_uitofp_i32_f64 |
432 | 524 |
433 define internal float @unsigned32ToFloat(i32 %a) { | 525 define internal float @unsigned32ToFloat(i32 %a) { |
434 entry: | 526 entry: |
435 %conv = uitofp i32 %a to float | 527 %conv = uitofp i32 %a to float |
436 ret float %conv | 528 ret float %conv |
437 } | 529 } |
438 ; CHECK-LABEL: unsigned32ToFloat | 530 ; CHECK-LABEL: unsigned32ToFloat |
439 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i32_f32 | 531 ; CHECK: call {{.*}} R_{{.*}} __Sz_uitofp_i32_f32 |
440 ; CHECK: fstp DWORD | 532 ; CHECK: fstp DWORD |
441 ; ARM32-LABEL: unsigned32ToFloat | 533 ; ARM32-LABEL: unsigned32ToFloat |
442 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} | 534 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], {{r[0-9]+}} |
443 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] | 535 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] |
| 536 ; MIPS32-LABEL: unsigned32ToFloat |
| 537 ; MIPS32: jal __Sz_uitofp_i32_f32 |
| 538 ; MIPS32O2-LABEL: unsigned32ToFloat |
| 539 ; MIPS32O2: jal __Sz_uitofp_i32_f32 |
444 | 540 |
445 define internal double @signed16ToDouble(i32 %a) { | 541 define internal double @signed16ToDouble(i32 %a) { |
446 entry: | 542 entry: |
447 %a.arg_trunc = trunc i32 %a to i16 | 543 %a.arg_trunc = trunc i32 %a to i16 |
448 %conv = sitofp i16 %a.arg_trunc to double | 544 %conv = sitofp i16 %a.arg_trunc to double |
449 ret double %conv | 545 ret double %conv |
450 } | 546 } |
451 ; CHECK-LABEL: signed16ToDouble | 547 ; CHECK-LABEL: signed16ToDouble |
452 ; CHECK: cvtsi2sd | 548 ; CHECK: cvtsi2sd |
453 ; CHECK: fld QWORD | 549 ; CHECK: fld QWORD |
454 ; ARM32-LABEL: signed16ToDouble | 550 ; ARM32-LABEL: signed16ToDouble |
455 ; ARM32-DAG: sxth [[INT:r[0-9]+]] | 551 ; ARM32-DAG: sxth [[INT:r[0-9]+]] |
456 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 552 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
457 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] | 553 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] |
| 554 ; MIPS32-LABEL: signed16ToDouble |
| 555 ; MIPS32: cvt.d.w |
| 556 ; MIPS32O2-LABEL: signed16ToDouble |
| 557 ; MIPS32O2: cvt.d.w |
458 | 558 |
459 define internal float @signed16ToFloat(i32 %a) { | 559 define internal float @signed16ToFloat(i32 %a) { |
460 entry: | 560 entry: |
461 %a.arg_trunc = trunc i32 %a to i16 | 561 %a.arg_trunc = trunc i32 %a to i16 |
462 %conv = sitofp i16 %a.arg_trunc to float | 562 %conv = sitofp i16 %a.arg_trunc to float |
463 ret float %conv | 563 ret float %conv |
464 } | 564 } |
465 ; CHECK-LABEL: signed16ToFloat | 565 ; CHECK-LABEL: signed16ToFloat |
466 ; CHECK: cvtsi2ss | 566 ; CHECK: cvtsi2ss |
467 ; CHECK: fld DWORD | 567 ; CHECK: fld DWORD |
468 ; ARM32-LABEL: signed16ToFloat | 568 ; ARM32-LABEL: signed16ToFloat |
469 ; ARM32-DAG: sxth [[INT:r[0-9]+]] | 569 ; ARM32-DAG: sxth [[INT:r[0-9]+]] |
470 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 570 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
471 ; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]] | 571 ; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]] |
| 572 ; MIPS32-LABEL: signed16ToFloat |
| 573 ; MIPS32: cvt.s.w |
| 574 ; MIPS32O2-LABEL: signed16ToFloat |
| 575 ; MIPS32O2: cvt.s.w |
472 | 576 |
473 define internal double @unsigned16ToDouble(i32 %a) { | 577 define internal double @unsigned16ToDouble(i32 %a) { |
474 entry: | 578 entry: |
475 %a.arg_trunc = trunc i32 %a to i16 | 579 %a.arg_trunc = trunc i32 %a to i16 |
476 %conv = uitofp i16 %a.arg_trunc to double | 580 %conv = uitofp i16 %a.arg_trunc to double |
477 ret double %conv | 581 ret double %conv |
478 } | 582 } |
479 ; CHECK-LABEL: unsigned16ToDouble | 583 ; CHECK-LABEL: unsigned16ToDouble |
480 ; CHECK: cvtsi2sd | 584 ; CHECK: cvtsi2sd |
481 ; CHECK: fld | 585 ; CHECK: fld |
482 ; ARM32-LABEL: unsigned16ToDouble | 586 ; ARM32-LABEL: unsigned16ToDouble |
483 ; ARM32-DAG: uxth [[INT:r[0-9]+]] | 587 ; ARM32-DAG: uxth [[INT:r[0-9]+]] |
484 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 588 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
485 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] | 589 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] |
| 590 ; MIPS32-LABEL: unsigned16ToDouble |
| 591 ; MIPS32: cvt.d.w |
| 592 ; MIPS32O2-LABEL: unsigned16ToDouble |
| 593 ; MIPS32O2: cvt.d.w |
486 | 594 |
487 define internal double @unsigned16ToDoubleConst() { | 595 define internal double @unsigned16ToDoubleConst() { |
488 entry: | 596 entry: |
489 %conv = uitofp i16 12345 to double | 597 %conv = uitofp i16 12345 to double |
490 ret double %conv | 598 ret double %conv |
491 } | 599 } |
492 ; CHECK-LABEL: unsigned16ToDoubleConst | 600 ; CHECK-LABEL: unsigned16ToDoubleConst |
493 ; CHECK: cvtsi2sd | 601 ; CHECK: cvtsi2sd |
494 ; CHECK: fld | 602 ; CHECK: fld |
495 ; ARM32-LABEL: unsigned16ToDoubleConst | 603 ; ARM32-LABEL: unsigned16ToDoubleConst |
496 ; ARM32-DAG: movw [[INT:r[0-9]+]], #12345 | 604 ; ARM32-DAG: movw [[INT:r[0-9]+]], #12345 |
497 ; ARM32-DAG: uxth [[INT]] | 605 ; ARM32-DAG: uxth [[INT]] |
498 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 606 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
499 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] | 607 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] |
| 608 ; MIPS32-LABEL: unsigned16ToDoubleConst |
| 609 ; MIPS32: cvt.d.w |
| 610 ; MIPS32O2-LABEL: unsigned16ToDoubleConst |
| 611 ; MIPS32O2: cvt.d.w |
500 | 612 |
501 define internal float @unsigned16ToFloat(i32 %a) { | 613 define internal float @unsigned16ToFloat(i32 %a) { |
502 entry: | 614 entry: |
503 %a.arg_trunc = trunc i32 %a to i16 | 615 %a.arg_trunc = trunc i32 %a to i16 |
504 %conv = uitofp i16 %a.arg_trunc to float | 616 %conv = uitofp i16 %a.arg_trunc to float |
505 ret float %conv | 617 ret float %conv |
506 } | 618 } |
507 ; CHECK-LABEL: unsigned16ToFloat | 619 ; CHECK-LABEL: unsigned16ToFloat |
508 ; CHECK: cvtsi2ss | 620 ; CHECK: cvtsi2ss |
509 ; CHECK: fld | 621 ; CHECK: fld |
510 ; ARM32-LABEL: unsigned16ToFloat | 622 ; ARM32-LABEL: unsigned16ToFloat |
511 ; ARM32-DAG: uxth [[INT:r[0-9]+]] | 623 ; ARM32-DAG: uxth [[INT:r[0-9]+]] |
512 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 624 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
513 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] | 625 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] |
| 626 ; MIPS32-LABEL: unsigned16ToFloat |
| 627 ; MIPS32: cvt.s.w |
| 628 ; MIPS32O2-LABEL: unsigned16ToFloat |
| 629 ; MIPS32O2: cvt.s.w |
514 | 630 |
515 define internal double @signed8ToDouble(i32 %a) { | 631 define internal double @signed8ToDouble(i32 %a) { |
516 entry: | 632 entry: |
517 %a.arg_trunc = trunc i32 %a to i8 | 633 %a.arg_trunc = trunc i32 %a to i8 |
518 %conv = sitofp i8 %a.arg_trunc to double | 634 %conv = sitofp i8 %a.arg_trunc to double |
519 ret double %conv | 635 ret double %conv |
520 } | 636 } |
521 ; CHECK-LABEL: signed8ToDouble | 637 ; CHECK-LABEL: signed8ToDouble |
522 ; CHECK: cvtsi2sd | 638 ; CHECK: cvtsi2sd |
523 ; CHECK: fld | 639 ; CHECK: fld |
524 ; ARM32-LABEL: signed8ToDouble | 640 ; ARM32-LABEL: signed8ToDouble |
525 ; ARM32-DAG: sxtb [[INT:r[0-9]+]] | 641 ; ARM32-DAG: sxtb [[INT:r[0-9]+]] |
526 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 642 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
527 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] | 643 ; ARM32-DAG: vcvt.f64.s32 {{d[0-9]+}}, [[SRC]] |
| 644 ; MIPS32-LABEL: signed8ToDouble |
| 645 ; MIPS32: cvt.d.w |
| 646 ; MIPS32O2-LABEL: signed8ToDouble |
| 647 ; MIPS32O2: cvt.d.w |
528 | 648 |
529 define internal float @signed8ToFloat(i32 %a) { | 649 define internal float @signed8ToFloat(i32 %a) { |
530 entry: | 650 entry: |
531 %a.arg_trunc = trunc i32 %a to i8 | 651 %a.arg_trunc = trunc i32 %a to i8 |
532 %conv = sitofp i8 %a.arg_trunc to float | 652 %conv = sitofp i8 %a.arg_trunc to float |
533 ret float %conv | 653 ret float %conv |
534 } | 654 } |
535 ; CHECK-LABEL: signed8ToFloat | 655 ; CHECK-LABEL: signed8ToFloat |
536 ; CHECK: cvtsi2ss | 656 ; CHECK: cvtsi2ss |
537 ; CHECK: fld | 657 ; CHECK: fld |
538 ; ARM32-LABEL: signed8ToFloat | 658 ; ARM32-LABEL: signed8ToFloat |
539 ; ARM32-DAG: sxtb [[INT:r[0-9]+]] | 659 ; ARM32-DAG: sxtb [[INT:r[0-9]+]] |
540 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 660 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
541 ; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]] | 661 ; ARM32-DAG: vcvt.f32.s32 {{s[0-9]+}}, [[SRC]] |
| 662 ; MIPS32-LABEL: signed8ToFloat |
| 663 ; MIPS32: cvt.s.w |
| 664 ; MIPS32O2-LABEL: signed8ToFloat |
| 665 ; MIPS32O2: cvt.s.w |
542 | 666 |
543 define internal double @unsigned8ToDouble(i32 %a) { | 667 define internal double @unsigned8ToDouble(i32 %a) { |
544 entry: | 668 entry: |
545 %a.arg_trunc = trunc i32 %a to i8 | 669 %a.arg_trunc = trunc i32 %a to i8 |
546 %conv = uitofp i8 %a.arg_trunc to double | 670 %conv = uitofp i8 %a.arg_trunc to double |
547 ret double %conv | 671 ret double %conv |
548 } | 672 } |
549 ; CHECK-LABEL: unsigned8ToDouble | 673 ; CHECK-LABEL: unsigned8ToDouble |
550 ; CHECK: cvtsi2sd | 674 ; CHECK: cvtsi2sd |
551 ; CHECK: fld | 675 ; CHECK: fld |
552 ; ARM32-LABEL: unsigned8ToDouble | 676 ; ARM32-LABEL: unsigned8ToDouble |
553 ; ARM32-DAG: uxtb [[INT:r[0-9]+]] | 677 ; ARM32-DAG: uxtb [[INT:r[0-9]+]] |
554 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 678 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
555 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] | 679 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] |
| 680 ; MIPS32-LABEL: unsigned8ToDouble |
| 681 ; MIPS32: cvt.d.w |
| 682 ; MIPS32O2-LABEL: unsigned8ToDouble |
| 683 ; MIPS32O2: cvt.d.w |
556 | 684 |
557 define internal float @unsigned8ToFloat(i32 %a) { | 685 define internal float @unsigned8ToFloat(i32 %a) { |
558 entry: | 686 entry: |
559 %a.arg_trunc = trunc i32 %a to i8 | 687 %a.arg_trunc = trunc i32 %a to i8 |
560 %conv = uitofp i8 %a.arg_trunc to float | 688 %conv = uitofp i8 %a.arg_trunc to float |
561 ret float %conv | 689 ret float %conv |
562 } | 690 } |
563 ; CHECK-LABEL: unsigned8ToFloat | 691 ; CHECK-LABEL: unsigned8ToFloat |
564 ; CHECK: cvtsi2ss | 692 ; CHECK: cvtsi2ss |
565 ; CHECK: fld | 693 ; CHECK: fld |
566 ; ARM32-LABEL: unsigned8ToFloat | 694 ; ARM32-LABEL: unsigned8ToFloat |
567 ; ARM32-DAG: uxtb [[INT:r[0-9]+]] | 695 ; ARM32-DAG: uxtb [[INT:r[0-9]+]] |
568 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 696 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
569 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] | 697 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] |
| 698 ; MIPS32-LABEL: unsigned8ToFloat |
| 699 ; MIPS32: cvt.s.w |
| 700 ; MIPS32O2-LABEL: unsigned8ToFloat |
| 701 ; MIPS32O2: cvt.s.w |
570 | 702 |
571 define internal double @unsigned1ToDouble(i32 %a) { | 703 define internal double @unsigned1ToDouble(i32 %a) { |
572 entry: | 704 entry: |
573 %a.arg_trunc = trunc i32 %a to i1 | 705 %a.arg_trunc = trunc i32 %a to i1 |
574 %conv = uitofp i1 %a.arg_trunc to double | 706 %conv = uitofp i1 %a.arg_trunc to double |
575 ret double %conv | 707 ret double %conv |
576 } | 708 } |
577 ; CHECK-LABEL: unsigned1ToDouble | 709 ; CHECK-LABEL: unsigned1ToDouble |
578 ; CHECK: cvtsi2sd | 710 ; CHECK: cvtsi2sd |
579 ; CHECK: fld | 711 ; CHECK: fld |
580 ; ARM32-LABEL: unsigned1ToDouble | 712 ; ARM32-LABEL: unsigned1ToDouble |
581 ; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1 | 713 ; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1 |
582 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 714 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
583 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] | 715 ; ARM32-DAG: vcvt.f64.u32 {{d[0-9]+}}, [[SRC]] |
| 716 ; MIPS32-LABEL: unsigned1ToDouble |
| 717 ; MIPS32: cvt.d.w |
| 718 ; MIPS32O2-LABEL: unsigned1ToDouble |
| 719 ; MIPS32O2: cvt.d.w |
584 | 720 |
585 define internal float @unsigned1ToFloat(i32 %a) { | 721 define internal float @unsigned1ToFloat(i32 %a) { |
586 entry: | 722 entry: |
587 %a.arg_trunc = trunc i32 %a to i1 | 723 %a.arg_trunc = trunc i32 %a to i1 |
588 %conv = uitofp i1 %a.arg_trunc to float | 724 %conv = uitofp i1 %a.arg_trunc to float |
589 ret float %conv | 725 ret float %conv |
590 } | 726 } |
591 ; CHECK-LABEL: unsigned1ToFloat | 727 ; CHECK-LABEL: unsigned1ToFloat |
592 ; CHECK: cvtsi2ss | 728 ; CHECK: cvtsi2ss |
593 ; CHECK: fld | 729 ; CHECK: fld |
594 ; ARM32-LABEL: unsigned1ToFloat | 730 ; ARM32-LABEL: unsigned1ToFloat |
595 ; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1 | 731 ; ARM32-DAG: and [[INT:r[0-9]+]], {{r[0-9]+}}, #1 |
596 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] | 732 ; ARM32-DAG: vmov [[SRC:s[0-9]+]], [[INT]] |
597 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] | 733 ; ARM32-DAG: vcvt.f32.u32 {{s[0-9]+}}, [[SRC]] |
| 734 ; MIPS32-LABEL: unsigned1ToFloat |
| 735 ; MIPS32: cvt.s.w |
| 736 ; MIPS32O2-LABEL: unsigned1ToFloat |
| 737 ; MIPS32O2: cvt.s.w |
598 | 738 |
599 define internal float @int32BitcastToFloat(i32 %a) { | 739 define internal float @int32BitcastToFloat(i32 %a) { |
600 entry: | 740 entry: |
601 %conv = bitcast i32 %a to float | 741 %conv = bitcast i32 %a to float |
602 ret float %conv | 742 ret float %conv |
603 } | 743 } |
604 ; CHECK-LABEL: int32BitcastToFloat | 744 ; CHECK-LABEL: int32BitcastToFloat |
605 ; CHECK: mov | 745 ; CHECK: mov |
606 ; ARM32-LABEL: int32BitcastToFloat | 746 ; ARM32-LABEL: int32BitcastToFloat |
607 ; ARM32: vmov s{{[0-9]+}}, r{{[0-9]+}} | 747 ; ARM32: vmov s{{[0-9]+}}, r{{[0-9]+}} |
| 748 ; MIPS32-LABEL: int32BitcastToFloat |
| 749 ; MIPS32: sw |
| 750 ; MIPS32: lwc1 |
| 751 ; MIPS32O2-LABEL: int32BitcastToFloat |
| 752 |
608 define internal float @int32BitcastToFloatConst() { | 753 define internal float @int32BitcastToFloatConst() { |
609 entry: | 754 entry: |
610 %conv = bitcast i32 8675309 to float | 755 %conv = bitcast i32 8675309 to float |
611 ret float %conv | 756 ret float %conv |
612 } | 757 } |
613 ; CHECK-LABEL: int32BitcastToFloatConst | 758 ; CHECK-LABEL: int32BitcastToFloatConst |
614 ; CHECK: mov | 759 ; CHECK: mov |
615 ; ARM32-LABEL: int32BitcastToFloatConst | 760 ; ARM32-LABEL: int32BitcastToFloatConst |
616 ; ARM32-DAG: movw [[REG:r[0-9]+]], #24557 | 761 ; ARM32-DAG: movw [[REG:r[0-9]+]], #24557 |
617 ; ARM32-DAG: movt [[REG]], #132 | 762 ; ARM32-DAG: movt [[REG]], #132 |
618 ; ARM32: vmov s{{[0-9]+}}, [[REG]] | 763 ; ARM32: vmov s{{[0-9]+}}, [[REG]] |
| 764 ; MIPS32-LABEL: int32BitcastToFloatConst |
| 765 ; MIPS32: lwc1 |
| 766 ; MIPS32O2-LABEL: int32BitcastToFloatConst |
619 | 767 |
620 define internal double @int64BitcastToDouble(i64 %a) { | 768 define internal double @int64BitcastToDouble(i64 %a) { |
621 entry: | 769 entry: |
622 %conv = bitcast i64 %a to double | 770 %conv = bitcast i64 %a to double |
623 ret double %conv | 771 ret double %conv |
624 } | 772 } |
625 ; CHECK-LABEL: int64BitcastToDouble | 773 ; CHECK-LABEL: int64BitcastToDouble |
626 ; CHECK: mov | 774 ; CHECK: mov |
627 ; ARM32-LABEL: int64BitcastToDouble | 775 ; ARM32-LABEL: int64BitcastToDouble |
628 ; ARM32: vmov d{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} | 776 ; ARM32: vmov d{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}} |
| 777 ; MIPS32-LABEL: int64BitcastToDouble |
| 778 ; MIPS32: sw |
| 779 ; MIPS32: sw |
| 780 ; MIPS32: ldc1 |
| 781 ; MIPS32O2-LABEL: int64BitcastToDouble |
629 | 782 |
630 define internal double @int64BitcastToDoubleConst() { | 783 define internal double @int64BitcastToDoubleConst() { |
631 entry: | 784 entry: |
632 %conv = bitcast i64 9035768 to double | 785 %conv = bitcast i64 9035768 to double |
633 ret double %conv | 786 ret double %conv |
634 } | 787 } |
635 ; CHECK-LABEL: int64BitcastToDoubleConst | 788 ; CHECK-LABEL: int64BitcastToDoubleConst |
636 ; CHECK: mov | 789 ; CHECK: mov |
637 ; ARM32-LABEL: int64BitcastToDoubleConst | 790 ; ARM32-LABEL: int64BitcastToDoubleConst |
638 ; ARM32-DAG: movw [[REG0:r[0-9]+]], #57336 | 791 ; ARM32-DAG: movw [[REG0:r[0-9]+]], #57336 |
639 ; ARM32-DAG: movt [[REG0]], #137 | 792 ; ARM32-DAG: movt [[REG0]], #137 |
640 ; ARM32-DAG: mov [[REG1:r[0-9]+]], #0 | 793 ; ARM32-DAG: mov [[REG1:r[0-9]+]], #0 |
641 ; ARM32-DAG: vmov d{{[0-9]+}}, [[REG0]], [[REG1]] | 794 ; ARM32-DAG: vmov d{{[0-9]+}}, [[REG0]], [[REG1]] |
| 795 ; MIPS32-LABEL: int64BitcastToDoubleConst |
| 796 ; MIPS32: ldc1 |
| 797 ; MIPS32O2-LABEL: int64BitcastToDoubleConst |
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